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SoC前端流程工程师

VeriSilicon, Inc.

RTL / HDLSoC / ASICPosted Jun 7, 2022
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• 负责芯片顶层及子模块的逻辑综合和时序分析,以及优化/收敛等; • 负责芯片顶层及子模块的时序约束文件编制,修改以及检查签核; • 完成芯片顶层及子模块前后期的面积评估,性能评估以及功耗分析; • 完成芯片顶层及子模块的前后期测试覆盖率评估与分析; • 实现芯片顶层及子模块的相关DFT RTL代码编写,扫描链,MBIST电路,边界扫描电路插入,以及测试pattern的生成及仿真等; • 协助物理实现工程师解决物理功能模块平面布置图设计、时序分析,优化/收敛方面的问题。

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Original posting: verisilicon.com

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RISC-V ecosystem

VeriSilicon, Inc. in the RISC-V ecosystem

RISC-V International: Strategic

VeriSilicon is a Silicon Platform as a Service company that provides world class SoC and SiP solutions and a leading IP provider with IP portfolios address markets including mobile internet devices, datacenters, the Internet of Things (IoT), automotive, industrial, and medical electronics.

  • VeriSilicon supplies the GPU, ISP and display IP that RISC-V SoCs integrate, plus custom silicon services
  • Its display processor IP was adopted in StarFive's RISC-V based JH-7110 vision platform
  • Canaan's RISC-V edge AIoT SoC adopted VeriSilicon ISP and GPU IPs, and its embedded GPU IP powers HPMicro's HPM6800 RISC-V MCU series

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