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数字电路设计工程师

Unisoc (Shanghai) Technologies Co., Ltd.

天津市RTL / HDLSoC / ASICFPGAPosted Dec 22, 2025
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Overview

Skills named in this posting

  • Verilog
1、参与SOC系统设计/IP设计; 2、完成模块级结构设计、RTL实现以及相关验证工作; 3、对已有电路进行功能改进和功耗、面积和性能的优化; 4、参与芯片设计整个流程,支持FPGA系统调试; 5、配合软件调试,支持产品量产。 1、通信、电子、计算机等相关专业硕士及以上学历; 2、具有芯片数字电路设计和验证实习相关经验优先; 3、熟练掌握Verilog和相关仿真环境,深入理解ASIC设计流程; 4、具备接口/IP/SoC芯片设计经验; 5、具备WiFi/BT/GNSS/5G&4G/多媒体/AI/车载/高速接口开发经验者优先; 6、具备良好的沟通能力和团队合作精神。

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Original posting: wecruit.hotjob.cn

Apply on Unisoc (Shanghai) Technologies Co., Ltd.

RISC-V ecosystem

Unisoc (Shanghai) Technologies Co., Ltd. in the RISC-V ecosystem

RISC-V International: Strategic

Unisoc, formerly Spreadtrum Communications, Inc., Unisoc has research centres in Shanghai, Beijing, Tianjin, Suzhou, Hangzhou, Chengdu, Xiamen, United States, Finland and India, technical support…

  • Unisoc (Shanghai) is a large Chinese mobile/IoT chipset vendor listed as a RISC-V member
  • Appears in RISC-V ecosystem coverage including a RISC-V ISA based DSP heading to mass production and RISC-V blockchain SIG activity

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