Senior Verification Engineer
Overview
- Added in 30 days
- 7
- At this company, still open
Skills named in this posting
- UVM
Our RTL team delivers efficient ASIC and FPGA implementations of advanced communications algorithms, working across IP development, integration and verification. To support this work, we are looking for a Senior Verification Engineer to support the complete UVM verification of Accelercomm IP.
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Original posting: accelercomm.pinpointhq.com
RISC-V ecosystem
Accelercom in the RISC-V ecosystem
5G physical layer for high-performance networks · RF · UK · founded 2016
Same employer
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