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Design Engineer(2)

VeriSilicon, Inc.

RTL / HDLSoC / ASICFPGAPosted May 11, 2022
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Skills named in this posting

  • Verilog
  • Microarchitecture
  • Python
• Digital Signal Processor and subsystem microarchitecture and design. • Write technical design documents. • Participate in design, architecture and verification reviews. • Conduct RTL design and synthesis to analyze & optimize area, speed and power of physical implementation. • Perform coding in Verilog and SytemVerilog for RTL implementation. • Define, maintain and enhance Block level verification environments for design modules. • Develop and support reusable design and verification infrastructure using scripting tools like python/perl. • Perform automation of daily tasks using scripting tools like python/perl. • Document Daily Work flow with ASIC and FPGA design and verification flows. • Develop and validate test cases to verify accuracy and efficiency of modeling tools.

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Original posting: verisilicon.com

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RISC-V ecosystem

VeriSilicon, Inc. in the RISC-V ecosystem

RISC-V International: Strategic

VeriSilicon is a Silicon Platform as a Service company that provides world class SoC and SiP solutions and a leading IP provider with IP portfolios address markets including mobile internet devices, datacenters, the Internet of Things (IoT), automotive, industrial, and medical electronics.

  • VeriSilicon supplies the GPU, ISP and display IP that RISC-V SoCs integrate, plus custom silicon services
  • Its display processor IP was adopted in StarFive's RISC-V based JH-7110 vision platform
  • Canaan's RISC-V edge AIoT SoC adopted VeriSilicon ISP and GPU IPs, and its embedded GPU IP powers HPMicro's HPM6800 RISC-V MCU series

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