Understanding and reducing environmental impacts in semiconductor manufacturing through Life-Cycle Assessment
Master internship - LeuvenPosted Oct 17, 2026
Overview
Skills named in this posting
- Python
Context The semiconductor industry is growing rapidly, as society becomes
increasingly digitalized, connected, and electrified. At the same time, continued
improvements in chip performance require increasingly complex manufacturing
processes, involving more process steps, materials and chemicals, and purity
requirements. Those trends are compounding the industry’s energy, water, and
material consumption, as well as its waste and emissions. To integrate environmental sustainability “by design” into chip
technology development, imec collaborates with key players from across the
value chain to assess and improve the sustainability of the semiconductor
industry. This endeavour requires a tool able to estimate the impacts from the
complex supply chain and manufacturing processes involved. This is why imec develops
imec.netzero , a virtual fab model
that simulates high-volume manufacturing semiconductor device fabs, quantifying
all related flows (materials, energy, water, emissions) and their environmental
impacts across the lifecycle. This bottom-up model quantifies the impact of
existing and emerging technologies, determines key environmental hotspots, and evaluates
mitigation options. It is consequently actively used by the industry to develop
and execute sustainability strategies. Objective In this internship, you will contribute to the Life-Cycle Assessment
(LCA) models inside imec.netzero, improving the completeness and robustness of chip
manufacturing sustainability quantification. In particular, you will research
and develop novel LCA models for aspects of chip manufacturing which are not
comprehensively characterized today. Depending on your interest and background,
possible topics include: Equipment and fab infrastructure manufacturing Supply chain for specialty gases or other
high-purity materials Modelling cleanroom purity requirements or on-site
gas fabrication (e.g. hydrogen) Direct emissions to air (or water) from
semiconductor fabs (e.g. NOx, VOCs, PM) Responsibilities You will align with the research team to select
an LCA research gap to address (e.g. from the list above) You will research existing literature, models, and
benchmarking data relevant to filling this gap You will develop LCA models, building on this
evidence and justified assumptions You will document and present the resulting
models to the research team and iterate based on their feedback Optional responsibilities based on student
interest: You will implement your models directly into the
imec.netzero codebase You will perform sensitivity analyses and propose
impact mitigation options Who you are: Applicants are expected to have some experience (and are
motivated to enhance their skills) in the following areas: LCA for hotspot analysis and mitigation
strategies Industrial process modelling or engineering,
ideally in semiconductor manufacturing [Optional] Python programming Type of internship : Master internship Duration : 4-6 months Required educational background : Chemistry/Chemical Engineering, Nanoscience & Nanotechnology, Mechanical Engineering, Materials Engineering, Electrotechnics/Electrical Engineering, Electromechanical engineering, Physics, Energy, Other Supervising scientist(s) : For further information or for application, please contact Vincent Schellekens ( Vincent.Schellekens@imec.be ) The reference code for this position is 2026-INT-281 . Mention this reference code in your application. Applications should include the following information: resume motivation current study Incomplete applications will not be considered
Apply on the employer's site
Original posting: imec-int.com
RISC-V ecosystem
imec in the RISC-V ecosystem
RISC-V International: Community
Interuniversity Microelectronics Centre is an international research & development organization, active in the fields of nanoelectronics and digital technologies.
- RISC-V research/design: system-level integration of a digital AI accelerator with RISC-V
- Participates in RISC-V automotive and space-chip ecosystem work
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