后端设计工程师
Overview
Skills named in this posting
- Low-power design (UPF)
• 负责SDC以及 UPF/CPF的开发和调试。
• 项目实施阶段的平面布置图设计,功耗规划,IO规划,布局布线 和CTS, 解决时序和拥塞问题。
• IP层面和芯片层面的物理验证,检查DFM规则。
• 静态和动态功耗分析、IR压降/ EM分析。
• 擅长时序分析,独立解决从网表/RTL到GDS开发过程中的所有时序问题。
• 负责所有功能模式的时序签收,配合DFT工程师完成扫描模式的时序收敛。
• 配合封装团队和IO团队妥善布局IO, 解决IO ESD、SSO和芯片供电问题。
• 与客户,应用工程师和销售人员沟通交流相关事宜。
Apply on the employer's site
Original posting: verisilicon.com
RISC-V ecosystem
VeriSilicon, Inc. in the RISC-V ecosystem
RISC-V International: Strategic
VeriSilicon is a Silicon Platform as a Service company that provides world class SoC and SiP solutions and a leading IP provider with IP portfolios address markets including mobile internet devices, datacenters, the Internet of Things (IoT), automotive, industrial, and medical electronics.
- VeriSilicon supplies the GPU, ISP and display IP that RISC-V SoCs integrate, plus custom silicon services
- Its display processor IP was adopted in StarFive's RISC-V based JH-7110 vision platform
- Canaan's RISC-V edge AIoT SoC adopted VeriSilicon ISP and GPU IPs, and its embedded GPU IP powers HPMicro's HPM6800 RISC-V MCU series
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