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Programme Coordinator (Postgraduate Education)

University of Cambridge

Department of Chemical Engineering and BiotechnologyPosted Oct 28, 2026
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Purpose of the role To co-ordinate the programme support systems and processes on behalf of the Department to ensure the smooth and efficient running of the course(s). The current departmental course portfolio includes: two PhD programmes (PhD in Chemical Engineering and PhD in Biotechnology), one Centre for Doctoral Training and one associated standalone MRes programme (in Sensor Technologies and Applications, one MPhil by Dissertation (MPhil in Chemical Engineering and Biotechnology) and two taught MPhil programmes (MPhil in Advanced Chemical Engineering and MPhil in Biotechnology). Key responsibilities Develop and maintain office procedures, review processes and develop systems to improve efficiency. Establish systems and processes for effective administration of student records and information, co-ordinate and update course documentation, maintain and update course website as required. Provide course coordination and administration. Co-ordinate updating of handbooks, check materials for accuracy of style and content and make recommendations for improvements where necessary. Contribute to relevant sections of brochure, proofread publicity and other materials including the course handbooks. Develop and review assignment and exam processes. Collect and collate assignments, liaise with markers, assist with the operational management of examinations, prepare course materials needed by faculty staff. Deal with enquiries from current and prospective students regarding the course such as application process, funding and course requirements. Provide advice on procedures and University regulations to students. Process student applications and gather additional information where required, liaise with the university admissions office, input information into student information system and monitor the progress. Oversee financial administration. Process finances and invoices, course fee instalments, student and tutor expenses and claims, travel and accommodation, monitor and report income and expenditure. Support research, teaching and learning. Work closely with course/ programme managers to contribute towards the organisation of research methods training and course sessions in support of teaching and learning activities and events. Act as secretary to committees, arrange and attend committee meetings. Create agenda, take and circulate minutes, and ensure follow up actions are implemented. Provide input/advice on issues related to the administration of the course/programme. Provide general course/programme administration such as book venues, prepare and distribute course material, book accommodation, travel and transport arrangements, provide administration support to Course/programme Director and other academics in the department. Gather, prepare and collate course information/ data e.g. course events and attendance, course feedback, student course activities for inclusion into reports written by others for internal and external stakeholders. Click the 'Apply' button below to register an account with our recruitment system (if you have not already) and apply online. Please quote reference NQ51452 on your application and in any correspondence about this vacancy. The University actively supports equality, diversity and inclusion and encourages applications from all sections of society. The University has a responsibility to ensure that all employees are eligible to live and work in the UK.

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Original posting: cam.ac.uk

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RISC-V ecosystem

University of Cambridge in the RISC-V ecosystem

RISC-V International: Community

The University of Cambridge is a collegiate public research university in Cambridge, United Kingdom.

  • University of Cambridge contributes RISC-V verification and security research
  • Home of TestRIG, a randomized testing (fuzzing) framework for RISC-V CPUs used to find ISA-conformance bugs
  • Its Computer Laboratory is also the origin of the CHERI capability architecture that is now being applied to RISC-V

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