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Layout Design, Staff Engineer

Synopsys

Seongnam-si, South KoreaRTL / HDLCompilersFirmwarePosted Oct 26, 2026
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Skills named in this posting

  • Verilog
  • Mixed-signal
  • PCIe
  • Ethernet
  • USB
  • SerDes
  • Python
  • Perl
Date posted 10.25.2026 Category Engineering Hire Type Employee Job ID 19269 Remote Eligible No Date Posted 10.25.2026 We Are Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow. Position Overview We are looking for a Staff Engineer to join our SerDes PHY IP firmware team and work alongside fellow engineers on PCS/PMA firmware for our next-generation SerDes PHY IP, supporting multiple protocols such as PCIe, Ethernet, and MIPI M-PHY. This is a senior individual-contributor role focused on hands-on firmware design and development, silicon bring-up, and customer issue resolution as a core member of the team. What You'll Be Doing * Develop firmware for next-generation SerDes PHY IP supporting multiple protocols, including PCIe, Ethernet, and MIPI M-PHY. * Design and maintain firmware for PHY startup, offset calibration, and adaptation flows. * Analyze and debug interactions between firmware, analog/mixed-signal front-end circuits, and digital PCS/PMA blocks. * Collaborate closely with systems, analog design, digital design, verification, and lab teams during firmware development and debugging. * Support and enhance existing firmware applications and features. * Develop and maintain firmware development infrastructure and tools. * Develop and improve firmware documentation to enhance customer usability and support. * Investigate and resolve customer-reported firmware issues and failures. * Lead firmware integration, debugging, and silicon bring-up activities on assigned areas. * Contribute to improvements in firmware design methodologies and system-level architecture through collaboration with cross-functional teams. The Impact You Will Have * Advance the development of high-performance firmware for next-generation technologies. * Enhance the functionality and reliability of Synopsys' SerDes PHY IP products. * Optimize system performance through post-silicon bring-up, characterization, and debugging activities. * Improve customer satisfaction through robust firmware solutions and comprehensive documentation. * Drive innovation in firmware design methodologies and system-level architecture. * Collaborate with cross-functional teams to deliver integrated solutions that push the boundaries of technology. What You'll Need (Required) * Bachelor's, Master's, or PhD degree in Computer Engineering, Electrical Engineering, or a related field, or equivalent industry experience. * 8+ years of experience in a related field. * Understanding of both digital logic and firmware/software development, with in-depth specialization in either. * Hands-on experience with assembly-level firmware development for embedded controllers or custom PHY sequencer ISAs. * Working knowledge of high-speed SerDes fundamentals and familiarity with at least one high-speed SerDes standard (e.g., PCIe, Ethernet, MIPI M-PHY, USB, or DisplayPort). * Experience with structured firmware development, verification, and documentation processes. * Familiarity with embedded software toolchains, including cross-compilers, assemblers, and on-target debuggers. * Ability to read and debug Verilog RTL (e.g., PHY FSM/sequencer RTL) to reason about firmware-hardware interactions. * Business-level English communication skills, both written and verbal, to work effectively with global cross-functional teams and customers. Preferred Qualifications * Deep expertise in PCIe, Ethernet, or MIPI M-PHY protocol layers. * Experience with multi-protocol SerDes PHY architectures. * RTL design or verification experience. * Scripting experience with Perl, Python, Bash, or Csh. * Silicon bring-up and lab debugging experience, including waveform tools (e.g., Verdi/FSDB), scopes, or BER testers. * Experience developing DSP microcode or firmware for other custom-ISA processors beyond PHY sequencers. * Experience with Perforce or Git-based version control workflows. * Experience using AI-assisted development tools for code review, documentation, or test generation. The Team You'll Be Part Of Your recruiter will share more about the team structure and mission during the interview process. Rewards and Benefits We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

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Original posting: careers.synopsys.com

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RISC-V ecosystem

Synopsys in the RISC-V ecosystem

Synopsys makes chip design software and processor IP, including ARC-V RISC-V cores. It acquired Intrinsic ID in 2024.

  • Security-IP (PUF/authentication) supplier active in the RISC-V ecosystem, incl. RISC-V Foundation showcases at Embedded World
  • Associated with RISC-V side-channel mitigation research (XDIVINSA instruction diversification)

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