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R&D Engineering, Staff Engineer

Synopsys

Morrisville, North CarolinaPosted Oct 27, 2026
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Skills named in this posting

  • C
  • C++
Date posted 10/25/2026 Category Engineering Hire Type Employee Job ID 19483 Date Posted 10/25/2026 THIS POSITION IS ELIGIBLE UNDE THE TERMS OF THE EMPLOYEE REFERRAL PROGRAM (ERP): R&D Engineering, Staff Engineer: Design, develop, test or debug EDA software products, solutions and related technologies in the digital design, custom design, silicon realization, systems design, verification, emulation, or silicon engineering functional areas. Enhance performance and capacity of IC Validator tool. Analyze performance issues through inspection of log files, performance graphing tools, and code inspection. Optimize problematic C/C++ algorithms through binning, optimized graph traversal, and memory management. Leverage threading and distributed processing to enhance scalability, combining intra- and inter- process parallelism across multiple hosts. Ensure efficient data storage, including use of compression techniques, local versus network disks, and efficient representation of data. Performance testing, coordination of code drops, analysis of results, and refinement of code based on test results. Utilize machine learning methodologies to optimize graphs and schedule tasks for distributed jobs and contribute to research to identify new AI applications. Apply learned techniques and contributes to analysis and investigation to solve problems. Build productive internal/external working relationships to resolve mutual problems by collaborating on procedures or transactions. 40 hours per week. Job Requirements: Requires a Master’s degree in Computer Science, Computer Engineering, Electrical/Electronic Engineering, or a related field and 6 months of experience in distributed task scheduling and load balancing. Also requires background in: C/C++; Linux; Distributed processing; Threading; Scheduling; Performance analysis and optimization; Code debuggers; Grid systems; and NFS, local disks, memory cache, and file compression techniques. Pay Range and Benefits Information: The base salary range across the U.S. for this role is between $153,882.56 to $180,000 per year. Multiple positions available. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. In addition to the base salary, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request. The base salary range for this role is across the U.S.

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Original posting: careers.synopsys.com

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RISC-V ecosystem

Synopsys in the RISC-V ecosystem

Synopsys makes chip design software and processor IP, including ARC-V RISC-V cores. It acquired Intrinsic ID in 2024.

  • Security-IP (PUF/authentication) supplier active in the RISC-V ecosystem, incl. RISC-V Foundation showcases at Embedded World
  • Associated with RISC-V side-channel mitigation research (XDIVINSA instruction diversification)

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