Applications Engineering, Sr Staff Engineer

We Are Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with customers across industries to maximize R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow. You Are You are an experienced applications or signoff engineer who combines strong hands-on expertise in physical verification and parasitic extraction with the judgment to lead complex customer engagements. You work independently on new and ambiguous assignments, determine an effective technical approach, and collaborate across customer teams, Sales, Business Units, and R&D to deliver critical results. You can diagnose difficult ICV and StarRC issues on advanced process nodes, including DRC/LVS/FILL/PERC discrepancies, RC modeling anomalies, extraction accuracy concerns, full-chip scalability limits, and timing correlation problems. You communicate clearly in sensitive or high-pressure situations, influence stakeholders toward practical solutions, and help raise the capability of less-experienced engineers through coaching and technical review. What You'll Be Doing • Own complex customer engagements using ICV and StarRC, from initial diagnosis through technical closure, to improve signoff readiness and support successful tape-outs. • Debug advanced physical verification and parasitic extraction issues, including DRC/LVS discrepancies, RC modeling anomalies, device and layer-mapping problems, timing correlation gaps, and full-chip performance or scalability limitations. • Determine methods and procedures for new assignments, define validation criteria, and drive evidence-based root-cause analysis across customer environments, field teams, and R&D. • Develop and refine ICV and StarRC methodologies that improve accuracy, runtime, memory efficiency, automation, and reliability for block, full-chip, custom, digital, and multi-die flows. • Support integrated flows and the full range of advanced ICV and StarRC verification and extraction capabilities, including emerging 3DIC designs. • Apply advanced debugging, analysis, and extraction features of ICV and StarRC to accelerate root-cause analysis and signoff closure. • Lead technical discussions during critical tape-out phases, align priorities across customer engineering teams and internal stakeholders, and drive blocking issues toward timely resolution. • Work directly with Synopsys R&D and Product teams to reproduce issues, communicate requirements, validate fixes and enhancements, and influence roadmap priorities based on measurable customer impact. • Provide technical guidance, review, and coaching to other applications engineers; create reusable debugging frameworks, training material, and documented best practices for the broader field organization. • Leverage scripting and AI-assisted techniques to automate analysis, accelerate issue triage, improve methodology development, and increase engineering productivity across ICV and StarRC workflows. The Impact You Will Have • Enable customers to achieve faster and more reliable signoff closure on advanced semiconductor designs. • Reduce technical risk, tape-out delay, and potential silicon re-spin exposure by resolving complex verification, extraction, and timing-correlation issues. • Improve adoption and effectiveness of ICV and StarRC through customer-specific methodology development and scalable full-chip solutions. • Create measurable impact across multiple related customer or product areas by connecting field requirements with Business Unit and R&D execution. • Strengthen customer trust and Synopsys technical credibility through consistent ownership, clear communication, and successful execution in critical situations. • Build organizational capability by reviewing technical work, coaching engineers, and converting individual solutions into reusable knowledge and practices. What You'll Need • Typically 12+ years of relevant experience in applications engineering, semiconductor design, physical verification, parasitic extraction, or signoff. Candidates with equivalent advanced expertise and impact will also be considered. • Advanced hands-on knowledge in physical verification and/or parasitic extraction using commercial EDA tools. Direct experience with ICV and StarRC is strongly preferred; equivalent experience with other vendors' DRC, LVS, FILL, PERC, or xRC (parasitic extraction) tools is also relevant. • Strong understanding of semiconductor design and foundry flows, including DRC, LVS, FILL, PERC or reliability verification, RC extraction, device and layer mapping, timing correlation, and block-to-full-chip signoff. • Familiarity with Advanced nodes, multi-patterning, and 3DIC or silicon photonics verification and extraction is a plus. • Demonstrated ability to independently resolve complex and ambiguous technical issues using structured analysis, measurable validation criteria, and sound engineering judgment. • Experience collaborating with semiconductor customers, Sales, Business Units, Product teams, and R&D during evaluations, methodology development, production deployment, or tape-out support. • Working proficiency in Linux/Unix and scripting with Tcl, Python, shell, or equivalent languages for automation and workflow customization. • Bachelor’s or Master’s degree in Electrical Engineering, Electronics Engineering, Computer Engineering, or a related discipline. • Strong Korean and English communication skills are preferred for customer engagement and collaboration with global Business Unit and R&D teams. Who You Are • You take independent ownership of complex assignments while knowing when to engage specialists or escalate business-critical risks. • You evaluate incomplete or conflicting data, identify the most relevant technical factors, and establish a practical path to a defensible conclusion. • You communicate complex concepts clearly to technical and non-technical audiences and can influence adjacent teams in ambiguous or sensitive situations. • You balance urgent customer needs with product quality, validation discipline, and long-term methodology improvements. • You review work constructively, coach less-experienced engineers, and help teams adopt consistent technical and customer-engagement practices. • You connect technical execution to broader customer adoption, product improvement, and business outcomes, backing your conclusions with clear evidence. The Team You'll Be Part Of You will join the Global Signoff Organization supporting customers using ICV and StarRC across physical verification and parasitic extraction workflows. You will work closely with Korea customer engineering teams and collaborate with global Business Unit, Product, and R&D organizations. The role combines direct customer ownership, advanced technical problem solving, methodology development, and contribution to the broader capability of the applications engineering organization.