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ASIC前端设计高级工程师（PHY）6786

Unisoc (Shanghai) Technologies Co., Ltd.

北京市RTL / HDLSoC / ASICFPGAPosted Dec 22, 2022
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Unisoc (Shanghai) Technologies Co., Ltd.
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Skills named in this posting

  • C++
  • Python
1、负责WIFI PHY modem核心模块开发, 完成RTL实现、验证及其它交付流程；2. 参与WIFI PHY modem的架构设计讨论； 3. 参与分析和优化模块的功耗、面积和性能； 4、参与FPGA原型验证系统设计和调试工作； 5、参与芯片Bringup测试和支持芯片量产工作。 1、电子，通信或计算机等关联专业硕士及以上学历； 2、熟悉WIFI 相关协议(802.11 g/n/ac/ax/be)，有WIFI6 / WIFI7开发经验者优先 3、3年以上WIFI PHY相关工作经验； 4、熟悉ASIC设计流程，较强RTL设计能力，熟悉C++/python优先； 5、较强的英文读写能力及团队协作精神；

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Original posting: wecruit.hotjob.cn

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RISC-V ecosystem

Unisoc (Shanghai) Technologies Co., Ltd. in the RISC-V ecosystem

RISC-V International: Strategic

Unisoc, formerly Spreadtrum Communications, Inc., Unisoc has research centres in Shanghai, Beijing, Tianjin, Suzhou, Hangzhou, Chengdu, Xiamen, United States, Finland and India, technical support…

  • Unisoc (Shanghai) is a large Chinese mobile/IoT chipset vendor listed as a RISC-V member
  • Appears in RISC-V ecosystem coverage including a RISC-V ISA based DSP heading to mass production and RISC-V blockchain SIG activity

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