RTL Design(Turing-AI/ML)-Sr Engineer/Sr Lead
Qualcomm Technologies, Inc.
Bangalore, IndiaRTL / HDL2025-11-10
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Modem design/RTL (Sr Staff)
Qualcomm Technologies, Inc.
Bangalore, IndiaRTL / HDLSoC / ASIC2025-11-07- Palo Alto OfficeRTL / HDLKernel / Linux2025-11-06
- Palo Alto OfficeRTL / HDLPhysical design2025-11-06
- Palo Alto OfficeRTL / HDL2025-11-06
- RTL / HDLPhysical designSoC / ASIC2025-11-05
- RTL / HDLVerificationPhysical design2025-11-05
Staff/Sr. Staff Design Verification Engineer
Lightmatter
Toronto, ONRTL / HDLVerification2025-11-04- MilpitasRTL / HDLSoC / ASIC2025-11-04
- Mountain View, CARTL / HDLPhysical designSoC / ASIC2025-11-03
- Toronto, ONRTL / HDLPhysical designSoC / ASIC2025-11-03
RTL Design Leader
STMicroelectronics International N.V.
Greater Noida, IndiaRTL / HDLVerificationPhysical designSoC / ASIC2025-10-30Senior Staff Engineer Verification
Infineon Technologies AG
Ahmedabad (India), Bangalore BTP (India)RTL / HDLVerificationSoC / ASIC2025-10-29CPU Physical Design Engineer_HsinChu
MediaTek Inc
HsinChuRTL / HDLPhysical design2025-10-28数字芯片设计工程师7907
Unisoc (Shanghai) Technologies Co., Ltd.
重庆市RTL / HDLSoC / ASICFPGA2025-10-24Hardware Systems Engineer
Extropic
BostonRTL / HDLFPGA2025-10-23Senior Staff Engineer Digital Verification
Infineon Technologies AG
HanoiRTL / HDLVerificationSoC / ASIC2025-10-16- San JoseRTL / HDLVerificationFirmwareSoC / ASIC2025-10-13
Hardware Engineer
Xcelerium
RISC-VRTL / HDLVerificationFirmware2025-10-13Senior VLSI Physical Design Engineer
Xcelerium
RTL / HDLVerificationPhysical designSoC / ASIC2025-10-13ASIC Microarchitect
Xcelerium
RISC-VRTL / HDLPhysical designSoC / ASIC2025-10-13Intership: System On Chip FE Designer
STMicroelectronics International N.V.
Agrate Brianza, ItalyRTL / HDLFirmwareSoC / ASIC2025-10-13CPU Verification Engineer, Up to Staff Level
Qualcomm Technologies, Inc.
Hsinchu City, TaiwanRTL / HDLVerificationCompilersFirmware2025-10-13- Austin, TXRTL / HDLVerificationCompilersFPGA2025-10-08
Computing System Architecture Engineer
MediaTek Inc
HsinChuRTL / HDLFPGA2025-09-30
