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790 results · page 14 of 32 · dates: UTC

FY27 Intern - Low-Power AI, Audio, and Sensors Subsystem Engineering Internship - ASIC Firmware / Embedded - Canada (12 or 16 months)
Qualcomm Technologies, Inc.
2026-09-15
Markham, Ontario, CanadaRISC-VVerificationFirmwareSoC / ASIC2026-09-15
IT Lead
Quintauris GmbH
2026-09-15
RISC-V2026-09-15
Wissenschaftliche*r Mitarbeiter*in Softwarearchitektur (all genders)
Fraunhofer Gesellschaft
2026-09-15
DresdenRISC-V2026-09-15
Principal Field Application Engineer
SiFive
2026-09-14
Shanghai, ChinaRISC-VRTL / HDLCompilersFirmware2026-09-14
Director, Supply Chain Management
Tenstorrent
2026-09-14
Santa Clara, California, United States; Toronto, Ontario, CanadaRISC-VCompilers2026-09-14
Staff Design Verification Engineer – Coherent Interconnect (CHI)
SiFive
2026-09-13
Boston, Massachusetts, United StatesRISC-VRTL / HDLVerificationSoC / ASIC2026-09-13
System Validation Engineer (New Grads)
SiFive
2026-09-13
Hsinchu, TaiwanRISC-VRTL / HDLFPGA2026-09-13
Staff Design Verification Engineer – High Performance CPU Core
SiFive
2026-09-13
Austin, Texas, United StatesRISC-VRTL / HDLVerificationCompilers2026-09-13
Staff Design Verification Engineer – CPU Core Verification (Vector)
SiFive
2026-09-13
Austin, Texas, United StatesRISC-VRTL / HDLVerificationCompilers2026-09-13
Staff Design Verification Engineer – CPU Core Verification (ALU)
SiFive
2026-09-13
Austin, Texas, United StatesRISC-VRTL / HDLVerificationCompilers2026-09-13
Staff Design Verification Engineer – CPU Core Formal Verification
SiFive
2026-09-13
Austin, Texas, United StatesRISC-VRTL / HDLVerificationSoC / ASIC2026-09-13
Staff Design Verification Engineer – CPU Core Formal Verification
SiFive
2026-09-13
Austin, Texas, United StatesRISC-VRTL / HDLVerificationSoC / ASIC2026-09-13
Staff Design Verification Engineer – CPU Core Formal Verification
SiFive
2026-09-13
Austin, Texas, United StatesRISC-VRTL / HDLVerificationSoC / ASIC2026-09-13
Senior Design Verification Engineer – High Performance CPU Core
SiFive
2026-09-13
Austin, Texas, United StatesRISC-VRTL / HDLVerificationCompilers2026-09-13
Senior Design Verification Engineer – CPU Core Verification (Vector)
SiFive
2026-09-13
Austin, Texas, United StatesRISC-VRTL / HDLVerificationCompilers2026-09-13
Product Power Engineer
SiFive
2026-09-13
Santa Clara, California, United StatesRISC-VRTL / HDLSoC / ASICFPGA2026-09-13
Global Supply Chain Manager, OSAT
Tenstorrent
2026-09-11
新北市, New Taipei City, TaiwanRISC-VCompilers2026-09-11
Corporate Controller
Tenstorrent
2026-09-11
Austin, Texas, United States; Boston, Massachusetts, United States; Raleigh, North Carolina, United StatesRISC-VCompilers2026-09-11
Sr. Strategic Sourcing Manager, Engineering Infrastructure
Tenstorrent
2026-09-11
Austin, Texas, United States; Santa Clara, California, United States; Toronto, Ontario, CanadaRISC-VCompilers2026-09-11
Principal Engineer , Software/Firmware - CXL/PCIe
Marvell Asia PTE Ltd
2026-09-11
Santa Clara, CARISC-VFirmwareSecurity2026-09-11
Senior Hardware Security Architect
NVIDIA Corporation
2026-09-11
US, CA, Santa ClaraRISC-VRTL / HDLSoC / ASICSecurity2026-09-11
Physical Design CPU Methodology Engineer
Tenstorrent
2026-09-10
Santa Clara, California, United StatesRISC-VRTL / HDLCompilersPhysical design2026-09-10
RISCV Infra System IP DV - Sr Lead Engineer
Qualcomm Technologies, Inc.
2026-09-10
Bangalore, IndiaRISC-VRTL / HDLVerificationFPGA2026-09-10
RISCV Infra System IP DV - Sr Staff Engineer
Qualcomm Technologies, Inc.
2026-09-10
Bangalore, IndiaRISC-VRTL / HDLVerificationFPGA2026-09-10
ASIC Design Verification Engineer
Niobium Microsystems
2026-09-10
United StatesRISC-VRTL / HDLVerificationSoC / ASIC2026-09-10