DDR Design Verification Lead Engineer
Qualcomm Technologies, Inc.
Hyderabad, Telangāna, IndiaRTL / HDLVerificationSoC / ASIC2026-10-23
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ASICS Design Verification Engineer-Senior to Staff
Qualcomm Technologies, Inc.
San Diego, California, United States of AmericaRTL / HDLVerificationSoC / ASIC2026-10-23ASIC Design Verification Engineer (Security Group) - Sr Staff
Qualcomm Technologies, Inc.
Santa Clara, California, United States of AmericaRISC-VRTL / HDLVerificationPhysical design2026-10-23Design Technology
Qualcomm Technologies, Inc.
Tijuana, Baja California, MexicoRTL / HDLVerificationPhysical designSoC / ASIC2026-10-23Silicon Co-Design Engineer - New College Grad 2026
NVIDIA Corporation
US, CA, Santa Clara2026-10-22ASIC Design Engineer – SoC Interconnect, Cache & Memory Systems
Qualcomm Technologies, Inc.
San Diego, California, United States of AmericaRTL / HDLVerificationPhysical designSoC / ASIC2026-10-22ASICS Design Verification Engineer
Qualcomm Technologies, Inc.
San Diego, California, United States of AmericaRTL / HDLVerificationSoC / ASIC2026-10-22- SoC / ASIC2026-10-22
ASIC Design Engineer, PCIe IP Enablement
Advanced Micro Devices (AMD)
MARKHAM, CanadaRTL / HDLPhysical designSoC / ASIC2026-10-21Staff Digital Verification Engineer GPU Hardware Design - Athens or Patra, Greece
Qualcomm Technologies, Inc.
Marousi, GreeceRTL / HDLVerificationPhysical designSoC / ASIC2026-10-21Senior Digital Design Verification Engineer GPU Hardware - Athens or Patra, Greece
Qualcomm Technologies, Inc.
Marousi, GreeceRTL / HDLVerificationPhysical designSoC / ASIC2026-10-21- Austin, TexasRTL / HDLPhysical designSoC / ASIC2026-10-21
ASIC Digital Design, Sr Engineer
Synopsys
Yerevan, ArmeniaRTL / HDLVerificationPhysical designSoC / ASIC2026-10-21Senior Digital Design Engineer GPU Hardware Design - Athens
Qualcomm Technologies, Inc.
Marousi, GreeceRTL / HDLVerificationPhysical designSoC / ASIC2026-10-20SoC Power Design Engineer
Qualcomm Technologies, Inc.
San Diego, California, United States of AmericaRTL / HDLVerificationPhysical designSoC / ASIC2026-10-20Staff Digital Design Engineer GPU Hardware - Athens
Qualcomm Technologies, Inc.
Marousi, GreeceRTL / HDLVerificationPhysical designSoC / ASIC2026-10-20ASIC Backend Engineer
RaiderChip
On-Site (Solares, Spain) • Full-timeRequirements: • Own the technical oversight of ASIC back-end executed by design service partners • Review, challenge, and validate P&R, timing closure, DRC/LVS, and sign-off results • Define and review backend constraints and deliverables • Strong understanding of physical design flows and trade-offs • Working experience with Synopsys tools • Proven experience with full ASIC tapeouts (strong plus)SoC / ASIC2026-10-20ASIC Verification Engineer
RaiderChip
On-Site (Solares, Spain) • Full-timeRequirements: • Develop and execute comprehensive verification strategies for ASIC designs • Create simulation environments to aggressively validate functionality • Leverage existing FPGA-proven designs as reference and validation baseline • Strong experience with RTL simulation and verification methodologies • Working experience with Synopsys toolsVerificationSoC / ASIC2026-10-20FPGA Engineer (Prototyping)
RaiderChip
On-Site (Solares, Spain) • Full-timeRequirements: • Use FPGA emulation to stress, debug, and validate ASIC-designs • Leverage long-running, proven FPGA prototypes as functional reference • Validate functionality through SW simulation and HW emulation • Collaborate closely with ASIC frontend and verification engineers • Drive issue detection, root-cause analysis, and fix validation • Strong experience with RTL simulation and FPGA toolchains (AMD/Xilinx)FPGA2026-10-20ASIC Digital Physical Design Engineer
Nordic Semiconductor ASA
Bristol, Stockholm, TamperePhysical designSoC / ASIC2026-10-20ASIC RTL Design Engineer
Nordic Semiconductor ASA
Bristol, StockholmRTL / HDLVerificationCompilersPhysical design2026-10-20- Hsinchu, Hsinchu County, TaiwanRISC-VRTL / HDLVerificationFirmware2026-10-20
Design Engineers & Engineering Leads
Netrasemi
Area: ASIC Design & Verification/ Embedded system / AI/ML Software/ Physical Design & Verification2026-10-20- Santa Clara, USRTL / HDLVerificationPhysical designSoC / ASIC2026-10-20
- Santa Clara, USRISC-VRTL / HDLCompilersFirmware2026-10-20
