🇺🇸 Sunnyvale, CARTL / HDL2026-10-15
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36,373 open roles across 332 companies · 4,120 added this week
3,311 results · page 23 of 133 · dates: UTC
Digital Architect
Avicena
🇺🇸 Sunnyvale, CARTL / HDLFirmwareSoC / ASIC2026-10-15Physical Design (PnR) Lead
Avicena
🇺🇸 Sunnyvale, CARTL / HDLCompilersPhysical designSoC / ASIC2026-10-15- 🇺🇸 Sunnyvale, CARTL / HDLPhysical design2026-10-15
- 🇺🇸 Sunnyvale, CARTL / HDL2026-10-15
SoC Physical Integration Engineer
Advanced Micro Devices (AMD)
San Jose, CaliforniaRTL / HDLVerificationCompilersPhysical design2026-10-15- US-CA-FULLERTON-675 ~ 1801 Hughes Dr ~ BLDG 675RTL / HDLVerificationFPGA2026-10-15
- US-CA-EL SEGUNDO-E04 ~ 2006 E El Segundo Blvd ~ BLDG E04RTL / HDLVerificationSoC / ASICFPGA2026-10-15
- US-CA-EL SEGUNDO-E04 ~ 2006 E El Segundo Blvd ~ BLDG E04RTL / HDLVerificationSoC / ASICFPGA2026-10-15
PD Engineer
Advanced Micro Devices (AMD)
Bangalore, IndiaRTL / HDLCompilersPhysical designSoC / ASIC2026-10-15PD Engineer
Advanced Micro Devices (AMD)
Bangalore, IndiaRTL / HDLCompilersPhysical designSoC / ASIC2026-10-15Staff Engineer - CPU DV
SiFive
Hyderabad, IndiaRISC-VRTL / HDLVerification2026-10-15- Bengaluru, Karnataka, IndiaRISC-VRTL / HDLCompilersPhysical design2026-10-15
Dir, Firmware Engineering
Lattice Semiconductor Corporation
Pune, IndiaRISC-VRTL / HDLKernel / LinuxFirmware2026-10-15Firmware Engineer II
Cadence Design Systems, Inc.
BEIJINGRTL / HDLFirmware2026-10-15Principal Formal Design Verification Engineer
Microsoft Corporation
India, Karnataka, BangaloreRTL / HDLVerificationSoC / ASIC2026-10-15STAGE - Ingénieur vérification digital - F/H
STMicroelectronics International N.V.
Crolles, FranceRTL / HDLVerification2026-10-15Staff / Senior Staff Engineer Digital Design (RTL Design)
Infineon Technologies AG
SingaporeRTL / HDLPhysical design2026-10-15Engineer / Senior Engineer Digital Design
Infineon Technologies AG
SingaporeRTL / HDLPhysical design2026-10-15Low-Power & CDC Verification Engineer
Advanced Micro Devices (AMD)
Santa Clara, CaliforniaRTL / HDLVerification2026-10-15Principal Digital ASIC Design Engineer
The Charles Stark Draper Laboratory, Inc.
Cambridge, MARTL / HDLPhysical designSoC / ASICSecurity2026-10-15Senior Principal Engineer, Emulation
Marvell Asia PTE Ltd
BangaloreRTL / HDLVerificationSoC / ASICFPGA2026-10-15Principal Engineer, Emulation
Marvell Asia PTE Ltd
BangaloreRTL / HDLVerificationSoC / ASICFPGA2026-10-15Senior Staff Engineer - Emulation
Marvell Asia PTE Ltd
BangaloreRTL / HDLVerificationSoC / ASICFPGA2026-10-15Senior Engineer, Logic Equivalence CAD
Marvell Asia PTE Ltd
BangaloreRTL / HDL2026-10-15
