The job board
Find work worth doing.
36,250 open roles across 332 companies · 4,297 added this week
427 results · page 3 of 18 · dates: UTC
US-IA-CEDAR RAPIDS-105 ~ 400 Collins Rd NE ~ BLDG 1052026-10-20
US-NC-WINSTON SALEM-961 ~ 961 Pinebrook Knolls Dr ~ PINEBROOK 9612026-10-20
US-IA-CEDAR RAPIDS-105 ~ 400 Collins Rd NE ~ BLDG 1052026-10-20
US-FL-JUPITER-ADR ~ 17900 Beeline Hwy ~ ADR BLDG2026-10-20
US-FL-JUPITER-ADR ~ 17900 Beeline Hwy ~ ADR BLDG2026-10-20
US-IA-CEDAR RAPIDS-131 ~ 5450 C Ave NE ~ BLDG 1312026-10-20
Philippines, Cavite, GTC2026-10-20
US, CA, Santa ClaraRTL / HDLVerificationPhysical designSoC / ASIC2026-10-20
Bengaluru,
IndiaFirmwareSoC / ASIC2026-10-20
Tustin, CA / Vietnam · Full-timeRISC-VCompilers2026-10-20
Monrovia, CAPhysical design2026-10-20
South KoreaCompilersPhysical designSoC / ASIC2026-10-20
On-Site (Solares, Spain) • Full-timeRequirements:
• Use FPGA emulation to stress, debug, and validate ASIC-designs
• Leverage long-running, proven FPGA prototypes as functional reference
• Validate functionality through SW simulation and HW emulation
• Collaborate closely with ASIC frontend and verification engineers
• Drive issue detection, root-cause analysis, and fix validation
• Strong experience with RTL simulation and FPGA toolchains (AMD/Xilinx)FPGA2026-10-20
Singapore2026-10-20
IBInternational Business Machines Corporation
Compilers2026-10-20
MalaysiaRTL / HDLCompilersPhysical designSoC / ASIC2026-10-20
Palo Alto OfficeRTL / HDLFirmwarePhysical designSoC / ASIC2026-10-19

Cadence Design Systems, Inc.
SAN JOSESoC / ASIC2026-10-19
Los Altos, CaliforniaRTL / HDL2026-10-18
Raanana IsraelRTL / HDL2026-10-18
US-IA-CEDAR RAPIDS-105 ~ 400 Collins Rd NE ~ BLDG 1052026-10-17
US-IA-CEDAR RAPIDS-137 ~ 855 35Th St NE ~ BLDG 137FirmwareFPGASecurity2026-10-17
US-IA-CEDAR RAPIDS-137 ~ 855 35Th St NE ~ BLDG 1372026-10-17
US-IA-CEDAR RAPIDS-137 ~ 855 35Th St NE ~ BLDG 1372026-10-17
US-NC-WINSTON SALEM-961 ~ 961 Pinebrook Knolls Dr ~ PINEBROOK 961Firmware2026-10-17