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2,278 results · page 3 of 92 · dates: UTC

Summer internship – Digital design engineer
lowRISC / lowRISC C.I.C.
2026-10-27
Cambridge, United KingdomRISC-VRTL / HDLVerificationSecurity2026-10-27
Director Design Engineering
MIPS Tech LLC.
2026-10-27
Richardson, Texas, United States of America, Austin, Texas, United States of AmericaRTL / HDLVerificationPhysical designSoC / ASIC2026-10-27
Validation/Verification Engineering, Sr Engineer
Synopsys
2026-10-27
Hillsboro, OregonVerification2026-10-27
R&D Engineering, Sr Manager
Synopsys
2026-10-27
Bengaluru, IndiaRTL / HDLVerificationSoC / ASIC2026-10-27
Senior Staff Emulation Engineer
Synopsys
2026-10-27
Hyderabad, IndiaRTL / HDLVerificationSoC / ASIC2026-10-27
Senior Staff Emulation Engineer
Synopsys
2026-10-27
Hyderabad, IndiaRTL / HDLVerificationSoC / ASIC2026-10-27
Senior Staff Emulation Engineer
Synopsys
2026-10-27
Noida, IndiaRTL / HDLVerificationSoC / ASIC2026-10-27
Senior Staff Emulation Engineer
Synopsys
2026-10-27
Noida, IndiaRTL / HDLVerificationSoC / ASIC2026-10-27
Senior Staff Emulation Engineer
Synopsys
2026-10-27
Bengaluru, IndiaRTL / HDLVerificationSoC / ASIC2026-10-27
Senior Staff Emulation Engineer
Synopsys
2026-10-27
Bengaluru, IndiaRTL / HDLVerificationSoC / ASIC2026-10-27
Principal Application Engineer - Verification
Synopsys
2026-10-27
United States Off-siteRTL / HDLVerification2026-10-27
Director - SoC Verification
Synopsys
2026-10-27
Hyderabad, IndiaVerificationSoC / ASIC2026-10-27
Senior Manager - SoC Verification
Synopsys
2026-10-27
Bengaluru, IndiaRTL / HDLVerificationSoC / ASIC2026-10-27
Architect - ASIC Digital IP Verification (Ethernet)
Synopsys
2026-10-27
Bengaluru, IndiaRTL / HDLVerificationSoC / ASIC2026-10-27
CPU Design Verification Engineer
Advanced Micro Devices (AMD)
2026-10-26
Santa Clara, CaliforniaRTL / HDLVerification2026-10-26
Senior CAD Software Engineer
Microsoft Corporation
2026-10-26
United States, California, Mountain View, United States, North Carolina, Raleigh, United States, Oregon, HillsboroRTL / HDLVerificationSoC / ASIC2026-10-26
Senior Digital Verification Engineer
CEVA, Inc.
2026-10-26
Belgrade, SerbiaRTL / HDLVerificationFirmware2026-10-26
Principal FPGA Design Engineer
RTX
2026-10-26
US-IN-FT WAYNE-150A ~ 1010 Production Rd ~ BLDG 150ARTL / HDLVerificationPhysical designSoC / ASIC2026-10-26
Senior FPGA Design Engineer
RTX
2026-10-26
US-IN-FT WAYNE-150A ~ 1010 Production Rd ~ BLDG 150ARTL / HDLVerificationPhysical designSoC / ASIC2026-10-26
Principal Systems Engineer – Architecture and Requirements in Cameo (P4)
RTX
2026-10-26
US-AZ-TUCSON-M09 ~ 3350 E Hemisphere Loop ~ BLDG M09Verification2026-10-26
Senior Systems Engineer – Architecture and Requirements in Cameo (P3)
RTX
2026-10-26
US-AZ-TUCSON-M09 ~ 3350 E Hemisphere Loop ~ BLDG M09Verification2026-10-26
Principal Hardware Electrical Engineer
RTX
2026-10-26
US-TX-MCKINNEY-513WD ~ 2501 W University Dr ~ WING D BLDGVerification2026-10-26
Senior Engineer - CPU DV
SiFive
2026-10-26
Hyderabad, IndiaRISC-VRTL / HDLVerification2026-10-26
Senior CPU Formal Verification Engineer
SiFive
2026-10-26
Hyderabad, IndiaRISC-VRTL / HDLVerification2026-10-26
In-Order Tile TestBench Design Verification Engineer
SiFive
2026-10-26
Hyderabad, IndiaRISC-VRTL / HDLVerificationSoC / ASIC2026-10-26