Senior Software Architect
Cadence Design Systems, Inc.
SAN JOSERTL / HDLVerification2026-09-25
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Senior Principal Software Engineer
Cadence Design Systems, Inc.
SAN JOSERTL / HDLVerification2026-09-25Design Verification - Senior Staff Engineer
Qualcomm Technologies, Inc.
Hyderabad, Telangāna, IndiaRTL / HDLVerificationFPGA2026-09-25Senior Staff Hardware Verification Engineer - Cork, Ireland
Qualcomm Technologies, Inc.
Cork, IrelandRTL / HDLVerificationSoC / ASICFPGA2026-09-25Power Management Systems Design and Verification Engineer
Qualcomm Technologies, Inc.
San Diego, California, United States of AmericaVerificationFirmware2026-09-25Senior Hardware Verification Engineer - Cork, Ireland
Qualcomm Technologies, Inc.
Cork, IrelandRTL / HDLVerificationSoC / ASICFPGA2026-09-25Hardware Verification Engineer - Cork, Ireland
Qualcomm Technologies, Inc.
Cork, IrelandRTL / HDLVerificationSoC / ASIC2026-09-25Staff Verification Engineer, Compute Subsystems
Qualcomm Technologies, Inc.
Markham, Ontario, CanadaRTL / HDLVerificationSoC / ASIC2026-09-25- Bengaluru, IndiaRTL / HDLVerification2026-09-25
- Bengaluru, IndiaRTL / HDLVerificationSoC / ASIC2026-09-25
Senior Principal GPU Verification Engineer
Imagination Technologies Group Ltd.
Kings Langley UK, Bristol UKRTL / HDLVerificationPhysical design2026-09-25Sr. RTL Design Engineer
Advanced Micro Devices (AMD)
San Jose, CaliforniaRTL / HDLVerificationCompilersPhysical design2026-09-24- Santa ClaraRemoteVerificationKernel / LinuxFirmwareSoC / ASIC2026-09-24
Lead IP Verification Engineer
Advanced Micro Devices (AMD)
San Jose, CaliforniaRTL / HDLVerificationFirmwarePhysical design2026-09-24- Hyderabad, IndiaRISC-VRTL / HDLVerificationSoC / ASIC2026-09-24
Data Center Silicon Hardware Engineering Intern - BS - 2027 Co-Op
Marvell Asia PTE Ltd
Ottawa, CanadaRTL / HDLVerificationPhysical design2026-09-24Sr. Manager, Digital Design
Analog Devices, Inc.
India, HyderabadRTL / HDLVerificationFirmwarePhysical design2026-09-24- US-AZ-TUCSON-807A ~ 1151 E Hermans Rd ~ BLDG 807AVerification2026-09-24
Stage Ingénieur : Génération de VIP et d’assertions pour IP mixtes par agents IA (F/H)
NXP Semiconductors Netherlands B.V.
ToulouseRTL / HDLVerificationFirmware2026-09-24Stage Ingénieur : Génération semi-automatique de modèles, stimuli et testbenches par agents IA (F/H)
NXP Semiconductors Netherlands B.V.
ToulouseRTL / HDLVerification2026-09-24Customer Engagement Architect
Cadence Design Systems, Inc.
SAN JOSERTL / HDLVerificationCompilers2026-09-24Lead Customer Engagement Engineer
Cadence Design Systems, Inc.
SAN JOSERTL / HDLVerification2026-09-24Lead Product Validation Engineer
Cadence Design Systems, Inc.
NOIDA 05RTL / HDLVerificationSoC / ASIC2026-09-24Lead Customer Engagement Engineer
Cadence Design Systems, Inc.
SAN JOSERTL / HDLVerification2026-09-24Software Engineer II: Hardware Verification R&D
Cadence Design Systems, Inc.
BELO HORIZONTERTL / HDLVerificationCompilers2026-09-24
