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3,287 results · page 42 of 132 · dates: UTC

• S

  Staff Application Engineer, Physical Design

  Synopsys

  2026-10-01

  Sunnyvale, CaliforniaRTL / HDLCompilersPhysical designSoC / ASIC2026-10-01
• CÀ

  Assistant(e) chef de projet – Project office du programme SupraFusion H/F

  commissariat à l'énergie atomique et aux énergies alternatives (CEA)

  2026-10-01

  Avenue des Accélérateurs, 91400 Saclay, FranceRTL / HDL2026-10-01
• A

  Senior Verification Engineer

  Accelercom

  2026-10-01

  Cambridge, UKRTL / HDLVerificationSoC / ASICFPGA2026-10-01
• 

  Verification Engineer

  Codasip / Codasip s.r.o.

  2026-10-01

  RISC-VRTL / HDLVerificationFirmware2026-10-01
• 

  STA/Constraints Engineer

  Advanced Micro Devices (AMD)

  2026-09-30

  VANCOUVER, CanadaRTL / HDLPhysical designSoC / ASIC2026-09-30
• 

  3D IC and SoC CAD ENGINEER

  Advanced Micro Devices (AMD)

  2026-09-30

  Austin, TexasRTL / HDLVerificationPhysical designSoC / ASIC2026-09-30
• 

  Design Verification Engineer - DDR Memory Subsystem

  Microsoft Corporation

  2026-09-30

  United States, North Carolina, Raleigh, United States, Texas, Austin, United States, Oregon, Hillsboro, United States, California, Mountain ViewRTL / HDLVerification2026-09-30
• 

  Principal Engineer Design

  Infineon Technologies AG

  2026-09-30

  BangaloreRTL / HDLPhysical designSoC / ASIC2026-09-30
• CI

  VLSI Backend Team Leader

  CEVA, Inc.

  2026-09-30

  Ra'anana, Israel (IL)RTL / HDLPhysical designSoC / ASIC2026-09-30
• 

  Silicon Design Engineer

  Advanced Micro Devices (AMD)

  2026-09-30

  MARKHAM, CanadaRTL / HDLVerificationFirmwareSoC / ASIC2026-09-30
• 

  Principal Engineer Design-Synthesis, LEC & CLP

  Infineon Technologies AG

  2026-09-30

  Bangalore BTPRTL / HDLPhysical designSoC / ASIC2026-09-30
• 

  AMS Verification Intern - Master's Degree

  Marvell Asia PTE Ltd

  2026-09-30

  SingaporeRTL / HDLVerification2026-09-30
• LS

  Modeling Design, Staff Engineer

  Lattice Semiconductor Corporation

  2026-09-30

  Pune, IndiaRTL / HDLFPGA2026-09-30
• 

  Engineer, Digital Design Engineering

  Analog Devices, Inc.

  2026-09-30

  Spain, Valencia, Cortes ValencianasRTL / HDLPhysical design2026-09-30
• QM

  Senior IC PDK Development Engineer

  Quantum Motion

  2026-09-30

  London, UKRTL / HDL2026-09-30
• 

  Soc Validation Engineer

  Advanced Micro Devices (AMD)

  2026-09-30

  Hyderabad, IndiaRTL / HDLFirmwareSoC / ASIC2026-09-30
• 

  Gate Level Design Verification

  Advanced Micro Devices (AMD)

  2026-09-30

  Iasi, RomaniaRTL / HDLVerificationPhysical design2026-09-30
• 

  Sr. Hardware Engineer

  Microsoft Corporation

  2026-09-30

  Taiwan, New Taipei City, New Taipei CityRTL / HDLFirmwareFPGA2026-09-30
• 

  Lead DFT DV Engineer

  Advanced Micro Devices (AMD)

  2026-09-30

  Hyderabad, IndiaRTL / HDLVerification2026-09-30
• DM

  Senior Manager, Information Security

  d-Matrix

  2026-09-30

  Santa ClaraRemoteRTL / HDLCompilersSecurity2026-09-30
• NS

  Physical Design Methodology Lead

  NXP Semiconductors Netherlands B.V.

  2026-09-30

  NoidaRTL / HDLPhysical designSoC / ASIC2026-09-30
• NS

  Senior IP Design Engineer

  NXP Semiconductors Netherlands B.V.

  2026-09-30

  BangaloreRTL / HDLVerificationSoC / ASIC2026-09-30
• NS

  Principal Physical Design Engineer

  NXP Semiconductors Netherlands B.V.

  2026-09-30

  Austin (Oakhill, Office)RTL / HDLPhysical designSoC / ASIC2026-09-30
• 

  Customer Engagement Engineer II

  Cadence Design Systems, Inc.

  2026-09-30

  SAN JOSERTL / HDLVerification2026-09-30
• 

  Intern Product Validation Engineering: AI Quality Assurance (QA)

  Cadence Design Systems, Inc.

  2026-09-30

  BELO HORIZONTERTL / HDL2026-09-30