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2,038 results · page 54 of 82 · dates: UTC

Staff, Technical Standards – RISC-V SOC (Korea/Taiwan/Singapore/Japan Remote)
Qualcomm Technologies, Inc.
2026-08-21
Republic of - Remote KOR, Korea, Republic of, Japan - Remote, Japan, Singapore - Remote, Singapore, Republic of China - Remote TWN, TaiwanRemoteRISC-VKernel / LinuxFirmwarePhysical design2026-08-21
ISP Design Engineer, up to Staff
Qualcomm Technologies, Inc.
2026-08-21
Taipei, Taipei City, TaiwanRTL / HDLFirmwarePhysical designSoC / ASIC2026-08-21
FPGA Emulation Engineer, up to Staff
Qualcomm Technologies, Inc.
2026-08-21
Hsinchu City, Taiwan, Taipei, Taipei City, TaiwanPhysical designSoC / ASICFPGA2026-08-21
[2027 Internship] CPU Design Implementation Intern
MediaTek Inc
2026-08-20
SingaporeRTL / HDLPhysical design2026-08-20
[2027 Internship] CPV AI Integration Engineer Intern
MediaTek Inc
2026-08-20
SingaporePhysical design2026-08-20
[2027 Internship] NPU Physical Implementation Intern
MediaTek Inc
2026-08-20
SingaporePhysical design2026-08-20
[2027 Internship] IC Physical Design Intern
MediaTek Inc
2026-08-20
SingaporePhysical designSoC / ASIC2026-08-20
[2027 Internship] Analog Design Intern Power Management Circuit
MediaTek Inc
2026-08-20
SingaporeVerificationPhysical designSoC / ASIC2026-08-20
芯片后端设计工程师8297
Unisoc (Shanghai) Technologies Co., Ltd.
2026-08-20
上海市Physical designSoC / ASIC2026-08-20
Senior RTL Design Engineer
SambaNova
2026-08-20
Austin, Texas, United States; San Jose, California, United StatesRTL / HDLVerificationPhysical designSoC / ASIC2026-08-20
Senior Staff Engineer
Infineon Technologies AG
2026-08-20
Bangalore BTPRTL / HDLVerificationCompilersPhysical design2026-08-20
Senior ASIC Power Management Micro Architect, Chip Design
NVIDIA Corporation
2026-08-20
Israel, Yokneam, Israel, Tel AvivRTL / HDLPhysical designSoC / ASIC2026-08-20
Principal CPU Architect - High-Performance and Physical Design
NVIDIA Corporation
2026-08-20
US, CA, Santa Clara, US, TX, Austin, US, OR, HillsboroRTL / HDLPhysical designSoC / ASIC2026-08-20
Senior STA Signoff Methodology Engineer
NVIDIA Corporation
2026-08-20
US, CA, Santa Clara, US, TX, AustinPhysical designSoC / ASIC2026-08-20
Physical Design Engineer, Staff
Qualcomm Technologies, Inc.
2026-08-20
Toronto, Ontario, CanadaPhysical designSoC / ASIC2026-08-20
DFT Engineer, Senior
Qualcomm Technologies, Inc.
2026-08-20
Toronto, Ontario, CanadaRTL / HDLVerificationPhysical designFPGA2026-08-20
DFT Engineer (Senior to Staff level)
Qualcomm Technologies, Inc.
2026-08-20
Toronto, Ontario, CanadaRTL / HDLPhysical designSoC / ASICFPGA2026-08-20
DFT Engineer, Principal
Qualcomm Technologies, Inc.
2026-08-20
Toronto, Ontario, CanadaRTL / HDLPhysical designSoC / ASICFPGA2026-08-20
PMTS Application Engineering (MIPS)
MIPS Tech LLC.
2026-08-20
SEOUL, Seoul, Korea, Republic ofRISC-VRTL / HDLCompilersFirmware2026-08-20
AI Automation Design Packaging Lead
Advanced Micro Devices (AMD)
2026-08-19
Austin, TexasVerificationCompilersFirmwarePhysical design2026-08-19
资深封装设计工程师
Unisoc (Shanghai) Technologies Co., Ltd.
2026-08-19
上海市Physical design2026-08-19
Principal RTL Design Engineer
SambaNova
2026-08-19
Austin, Texas, United States; San Jose, California, United StatesRTL / HDLVerificationPhysical designSoC / ASIC2026-08-19
Package Layout Engineer
Lightmatter
2026-08-19
Mountain View, CAPhysical designSoC / ASIC2026-08-19
System-Level Power and Thermal Modelling Researcher
imec
2026-08-19
Research & development - LeuvenPhysical designSoC / ASIC2026-08-19
Director of ASIC Design Verification
SambaNova
2026-08-19
San Jose, California, United StatesRTL / HDLVerificationCompilersPhysical design2026-08-19