2027 Student Engineer - CPU Design Verification
Advanced Micro Devices (AMD)
Iasi, RomaniaRTL / HDLVerification2026-10-22
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Sr. Manager Systems Design Engineer
Advanced Micro Devices (AMD)
Taipei, TaiwanFirmwareSoC / ASIC2026-10-22- GB-HAM-HAVANT-001 ~ 1 Penner Rd ~ ALEXANDRIA PK, Unit 32026-10-22
Senior Digital Electronics Design Engineer
The Charles Stark Draper Laboratory, Inc.
Cambridge, MAFirmwareFPGA2026-10-22Design Engineer Intern
Marvell Asia PTE Ltd
YokneamRTL / HDLFirmwarePhysical designSoC / ASIC2026-10-22Package Layout Design Staff/Senior Staff Engineer
Marvell Asia PTE Ltd
BangalorePhysical designSoC / ASIC2026-10-22Advanced Packaging Design - SI/PI Engineer
Marvell Asia PTE Ltd
Westborough, MAPhysical design2026-10-22Sr Principal Design Engineer- Mixed Signal
Cadence Design Systems, Inc.
CARYRTL / HDL2026-10-22Lead Application Engineer- Adams
Cadence Design Systems, Inc.
SHANGHAI2026-10-22Lead Design Engineer - SOC Design
Cadence Design Systems, Inc.
SHANGHAIRISC-VRTL / HDLVerification2026-10-22Product Engineering Architect – High-Speed IP PHY
Cadence Design Systems, Inc.
GYEONGGI-DO (Seoul)RTL / HDLPhysical designSoC / ASIC2026-10-22Sr. Principal Software Engineer
Cadence Design Systems, Inc.
AUSTIN2026-10-22Lead EDA Software Engineer (C++, Characterization)
Cadence Design Systems, Inc.
SAN JOSE2026-10-22Analog Design Engineering Intern
Analog Devices, Inc.
United Kingdom, Edinburgh, SC, Freer2026-10-22Senior Digital Design Engineer
Analog Devices, Inc.
United Kingdom, Edinburgh, SC, FreerRTL / HDLFirmwarePhysical designSoC / ASIC2026-10-22Senior Firmware Design Engineer
NVIDIA Corporation
Israel, YokneamFirmware2026-10-22FY27 Intern - Camera Design Implementation Intern - Canada (16 months)
Qualcomm Technologies, Inc.
Vancouver, British Columbia, CanadaRTL / HDLVerificationPhysical designSoC / ASIC2026-10-22Senior MGX Ecosystem Engineer, Power
NVIDIA Corporation
US, CA, Santa ClaraFirmware2026-10-22Silicon Co-Design Engineer - New College Grad 2026
NVIDIA Corporation
US, CA, Santa Clara2026-10-22Power Validation Engineer
NVIDIA Corporation
US, CA, Santa Clara2026-10-22CPU Low Power RTL Design Engineer
Qualcomm Technologies, Inc.
Santa Clara, California, United States of AmericaRTL / HDL2026-10-22ASIC Design Engineer – SoC Interconnect, Cache & Memory Systems
Qualcomm Technologies, Inc.
San Diego, California, United States of AmericaRTL / HDLVerificationPhysical designSoC / ASIC2026-10-22ASICS Design Verification Engineer
Qualcomm Technologies, Inc.
San Diego, California, United States of AmericaRTL / HDLVerificationSoC / ASIC2026-10-22NPU RTL Design Engineer
Qualcomm Technologies, Inc.
San Diego, California, United States of AmericaRTL / HDLVerificationPhysical designSoC / ASIC2026-10-22NPU Design Verification Engineer (Multiple Levels)
Qualcomm Technologies, Inc.
San Diego, California, United States of AmericaRTL / HDLVerification2026-10-22
