Date Posted: 2026-10-13 Country: United States of America Location: US-IA-CEDAR RAPIDS-108 ~ 400 Collins Rd NE ~ BLDG 108 Position Role Type: Onsite U.S. Citizen, U.S. Person, or Immigration Status Requirements: The ability to obtain an
Physical design jobs 2,034
Physical design, place-and-route, timing closure and backend flows.
Roles 361–390 of 2,034, newest first.
- US-IA-CEDAR RAPIDS-108 ~ 400 Collins Rd NE ~ BLDG 108RTL / HDLPhysical designSoC / ASICOct 14, 2026
Lead Principal Engineer - Digital Design
Infineon Technologies AG
Bangalore BTPRTL / HDLFirmwarePhysical designOct 14, 2026You will be responsible for the architecture, design, and delivery of complex digital IP, ASIC, and SoC solutions. This role drives key technical initiatives, leads major subsystem developments, and collaborates across engineering organizat
Static Timing Analysis Design Engineer / Physical Design
NXP Semiconductors Netherlands B.V.
Austin (Oakhill, Office)Physical designSoC / ASICOct 14, 2026We are seeking an experienced engineer for SoC Static Timing Analysis for advanced semiconductor products. This role will own end-to-end Timing Constraints and Static Timing Analysis across complex designs, driving initial constraints devel
Static Timing Analysis Design Engineer / Physical Design
NXP Semiconductors Netherlands B.V.
Austin (Oakhill, Office)Physical designSoC / ASICOct 14, 2026We are seeking an experienced engineer for SoC Static Timing Analysis for advanced semiconductor products. This role will own end-to-end Timing Constraints and Static Timing Analysis across complex designs, driving initial constraints devel
Physical Design Intern - Master's Degree
Marvell Asia PTE Ltd
SingaporeRTL / HDLPhysical designSoC / ASICOct 14, 2026About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new pos
Sr Application Engineer
Cadence Design Systems, Inc.
PENANG 02RTL / HDLPhysical designSoC / ASICOct 14, 2026At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Sr Application Engineer – Digital Implementation & Physical Design Location: Malaysia Job Overview We are seeking a Sr Applica
Video IP Design Verification Engineer
Qualcomm Technologies, Inc.
Bangalore, IndiaRTL / HDLVerificationPhysical designOct 14, 2026Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation ex
Microcontroller Sub-System Design Engineer/ Staff Engineer
Qualcomm Technologies, Inc.
Cork, IrelandRTL / HDLVerificationPhysical designOct 14, 2026Company: QT Technologies Ireland Limited Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation e
RFIC Circuit Design Engineer, Senior
Qualcomm Technologies, Inc.
Bangalore, IndiaPhysical designSoC / ASICOct 14, 2026Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary: Qualcomm's Radio Frequency Integrated Circuit (RFIC) design center in Bangalore designs advanced cellular RFIC's
Senior Hardware Engineer - SoC Architecture & Design - Qualcomm - Grenoble, France
Qualcomm Technologies, Inc.
Grenoble, FranceRISC-VRTL / HDLVerificationOct 14, 2026Company: Qualcomm France S.A.R.L. Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary: We are looking for an experienced Hardware Engineer to contribute to the architecture, micro-architecture, and RTL desi
Senior FPGA/Silicon Design Engineer
Microsoft Corporation
United States, Washington, Redmond, United States, California, Mountain ViewRTL / HDLFirmwarePhysical designOct 13, 2026Overview Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission. SCHIE delivers the core
Director, Silicon Design
Microsoft Corporation
United States, North Carolina, Raleigh, United States, California, Mountain ViewRTL / HDLVerificationPhysical designOct 13, 2026Overview Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission. SCHIE delivers the core
Design Verification Lead
Advanced Micro Devices (AMD)
MARKHAM, CanadaRTL / HDLVerificationFirmwareOct 13, 2026ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every
PD SC-USA Remote
Baya Systems
Austin, Texas, United States; Santa Clara, California, United StatesRTL / HDLPhysical designSoC / ASICOct 13, 2026Baya Systems is inspired by the baya bird, also known as the weaver. Baya birds weave very unique and intricate hanging nests from different materials. The nests are robust and safe while being extremely lightweight and efficient. Baya is a
- Research & development - NaplesPhysical designSoC / ASICOct 13, 2026
Physical ASIC Design Implementation Engineer What you will do For more than 25 years, imec has provided ASIC prototyping and production services to companies and universities worldwide. Imec supports its customers in designing integrated
Principal Engineer, EDA Software Development
Lattice Semiconductor Corporation
Hyderabad, IndiaCompilersPhysical designSoC / ASICOct 13, 2026Lattice Overview There is energy here…energy you can feel crackling at any of our international locations. It’s an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide c
Principal/Lead Principal Engineer - IC Hardware Architecture
Infineon Technologies AG
SingaporeRTL / HDLPhysical designOct 13, 2026#WeAreIn for jobs that impact everyone's life. Build the future nobody’s dreamed of yet... are you ready to rethink the impossible? As a System Concept Engineer on our Research & Development team, you'll have the opportunity to merge crea
STA Engineer - EDA/CAD Flow : Software Development Engineer
Advanced Micro Devices (AMD)
Hyderabad, IndiaRTL / HDLPhysical designOct 13, 2026ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every
- Seoul, South KoreaRISC-VRTL / HDLVerificationOct 13, 2026
About FuriosaAI FuriosaAI builds high-performance, high-efficiency AI compute for the Inference Era. Founded in 2017 by veteran semiconductor and AI algorithm engineers, Furiosa operates globally with offices in Korea and Silicon Valley, al
Principal Hardware Architect - Microsoft Azure
Microsoft Corporation
Israel, Haifa, Haifa, Israel, Tel Aviv, Tel AvivPhysical designSoC / ASICOct 13, 2026Overview Microsoft is building the fastest and most reliable networks for AI and cloud data centers. Microsoft Azure is one of the largest public cloud platforms worldwide, providing a great channel for product impact that touches the live
- IN-KA-BENGALURU-NORTHGATE ~ Sy No 2/2 Venkatala Village ~ SY NO 2/2 VENKATALA VILLAGE, Yelahanka HobliRTL / HDLPhysical designFPGAOct 13, 2026
Date Posted: 2026-10-12 Country: India Location: IN-KA-BENGALURU-NORTHGATE ~ Sy No 2/2 Venkatala Village ~ SY NO 2/2 VENKATALA VILLAGE, Yelahanka Hobli Position Role Type: Hybrid At RTX, the world's largest aerospace and defense company
- US-AL-HUNTSVILLE-315 ~ 315 Bob Heath Dr ~ BOB HEATHRTL / HDLFirmwarePhysical designOct 13, 2026
Date Posted: 2026-10-12 Country: United States of America Location: US-AL-HUNTSVILLE-315 ~ 315 Bob Heath Dr ~ BOB HEATH Position Role Type: Onsite U.S. Citizen, U.S. Person, or Immigration Status Requirements: The ability to obtain and
- US-IN-FT WAYNE-150A ~ 1010 Production Rd ~ BLDG 150ARTL / HDLVerificationPhysical designOct 13, 2026
Date Posted: 2026-10-12 Country: United States of America Location: US-IN-FT WAYNE-150A ~ 1010 Production Rd ~ BLDG 150A Position Role Type: Onsite U.S. Citizen, U.S. Person, or Immigration Status Requirements: The ability to obtain and
- US-IN-FT WAYNE-150A ~ 1010 Production Rd ~ BLDG 150ARTL / HDLPhysical designSoC / ASICOct 13, 2026
Date Posted: 2026-10-12 Country: United States of America Location: US-IN-FT WAYNE-150A ~ 1010 Production Rd ~ BLDG 150A Position Role Type: Onsite U.S. Citizen, U.S. Person, or Immigration Status Requirements: The ability to obtain and
- US-GA-MIDLAND-AB1 ~ 8801/8987 Macon Rd ~ BLDG AB1Physical designOct 13, 2026
Date Posted: 2026-10-12 Country: United States of America Location: US-GA-MIDLAND-AB1 ~ 8801/8987 Macon Rd ~ BLDG AB1 Position Role Type: Onsite U.S. Citizen, U.S. Person, or Immigration Status Requirements: U.S. citizenship is required
Staff Engineer Analog Layout
Infineon Technologies AG
PenangPhysical designOct 13, 2026Bring your expertise in analog IC layout to a team that thrives on innovation. Design, optimize, and deliver high-performance semiconductor solutions while working on advanced technology nodes and industry-leading products. Your role Key r
Senior Analog IC Layout Engineer
NXP Semiconductors Netherlands B.V.
GuadalajaraPhysical designOct 13, 2026About the Team NXP Semiconductors is seeking an experienced Analog IC Layout Engineer to join the Central Layout Group serving the Power & Energy Business Line, with a primary focus on Automotive Power Solutions (APS). The Central Layout
SoC Physical Designer
NXP Semiconductors Netherlands B.V.
Tianjin (Teda)RTL / HDLPhysical designSoC / ASICOct 13, 2026As a Graduate Physical Design Engineer, you will participate in the development of advanced semiconductor products and be involved in the complete physical implementation flow. Your responsibilities include: • Support SoC and subsystem ph
Software Engineer II
Cadence Design Systems, Inc.
HSINCHUPhysical designOct 13, 2026At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Placement Team (Cadence Innovus) Job Description As a member of our Placement Team, you will design, develop, maintain, and enh
Senior Principal Design Engineer
Cadence Design Systems, Inc.
NanjingPhysical designOct 13, 2026At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Job Responsibilities: Focus on high-speed interface PHY IP physical implementation, develop necessary scripts or tools to enhanc