Physical design, place-and-route, timing closure and backend flows.
Roles 931–960 of 2,037, newest first.
NXP Semiconductors Netherlands B.V.
Responsibilities: • End-to-End Project Ownership: Own SoC program execution from project definition through tape-out and post-silicon support. Ensure on-time, high-quality delivery of key milestones and coordinate engineering support durin
NXP Semiconductors Netherlands B.V.
Summary: The SOC Architect designs a complete and complex framework, system or product. Defines processes for technical platforms, system specifications, input/output and working parameters for hardware and/or software compatibility. Concei
NXP Semiconductors Netherlands B.V.
As an AI/ML driven ASIC Design and Implementation Automation Engineer in our Advanced Chip Engineering (ACE) organization, you will work in a dynamic environment to explore methodology, flows and tools to improve efficiency and quality of r
NXP Semiconductors Netherlands B.V.
Generic Job Description (not Job Level specific): The Design Methodologies and Tools Engineer / Architect develops and applies Computer Aided Design (CAD) software engineering methods, theories and research techniques in the investigation a
NXP Semiconductors Netherlands B.V.
We are looking for an experienced ASIC Physical Verification Lead with around 10 years of experience to drive physical verification signoff activities for complex SoC and IP designs across multiple technology nodes. Key Responsibilities •
NXP Semiconductors Netherlands B.V.
As AI models continue to grow in size and complexity, memory subsystems are emerging as a fundamental bottleneck in modern AI accelerators. The efficiency of future NPU-based systems will increasingly depend on how data is stored, moved, an
NXP Semiconductors Netherlands B.V.
Business Unit Description • AI Chip Engineering Digital IP team defines and develops components for a wide range of products, including automotive microprocessors, application processors, microcontrollers, and networking. The Austin Digita
NXP Semiconductors Netherlands B.V.
About the Team NXP Semiconductors is seeking an Analog IC Layout Engineer to join the Central Layout Group serving the Power & Energy Business Line, with a primary focus on Automotive Power Solutions (APS). The Central Layout Group delive
NXP Semiconductors Netherlands B.V.
Contexte NXP Semiconductors est un acteur mondial majeur de l'innovation dans le domaine des semi-conducteurs, au cœur des technologies qui alimentent les systèmes automobiles, industriels, IoT et les solutions de connectivité sécurisée de
NXP Semiconductors Netherlands B.V.
NXP’s Industrial & IoT Edge solutions range from the smallest MCUs to very high-performance processors to provide real-time insights and efficient automation when performance matters most. NXP’s advanced portfolio of edge processing solutio
NXP Semiconductors Netherlands B.V.
Responsibilities: • Implement and verify Scan, MBIST, and Boundary Scan solutions for complex SoC designs. • Perform scan insertion, DFT DRC checking, and scan chain validation to ensure testability and design quality. • Analyze fault cover
NXP Semiconductors Netherlands B.V.
Role Summary: • Lead digital architecture, design, verification, and implementation of next-generation Power Management ICs (PMICs) for automotive and industrial applications. • Drive product execution from concept through RTL development,
NXP Semiconductors Netherlands B.V.
Senior DFT Engineer: You will be responsible for designing, implementing, and verifying DFT architectures for complex SoCs. You will work closely with RTL, physical design, and verification teams to ensure robust testability and high-qualit
Cadence Design Systems, Inc.
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. GCS AE Job Description Document Job Title: Lead Application Engineer - GCS Location: Bangalore / Noida Cadence is a pivotal le
Cadence Design Systems, Inc.
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The compa
Cadence Design Systems, Inc.
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. • Position RequirementsM.S. or BTech Electrical/Computer/Electronics Engineering (or similar degree)Experience - 7+ yearssound kn
Cadence Design Systems, Inc.
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. · This role requires close interaction with multiple cross functional teams across geographies to align on project receivables/de
Cadence Design Systems, Inc.
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The compa
Cadence Design Systems, Inc.
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. -Provide technical leadership in conceptualizing and architecting the frontend digital design of our products, defining micro-arc
Cadence Design Systems, Inc.
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Job Responsibilities: Digital design implementation of state-of-the-art Cadence IPs using Cadence EDA tools - Genus, Innovus, Te
Cadence Design Systems, Inc.
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Job Title: Principal Design Engineer Location: Bangalore Cadence is a pivotal leader in electronic design, building upon more t
Cadence Design Systems, Inc.
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The compa
Cadence Design Systems, Inc.
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. JD for Virtuoso Layout req Your role will be to meet customers/prospects and identify & qualify the opportunities, work out agree
Cadence Design Systems, Inc.
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. 1.To provide key technical support in digital IC design implementation. 2.To demonstrate strong ability and to be hands-on in RTL
Cadence Design Systems, Inc.
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. • The candidate will perform the physical design implementation, including floor planning, power grid design, place and route, cl
Cadence Design Systems, Inc.
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The compa
Cadence Design Systems, Inc.
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Job Summary We are seeking a highly skilled RTL Design Engineer with deep expertise in PCIe protocol (Gen4/Gen5/Gen6) to join ou
Cadence Design Systems, Inc.
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. • Independently drive RTL-to-GDSII metrics on complex designs • Drive methodology and solution-oriented discussions with key stak
Cadence Design Systems, Inc.
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Position Description: 1. To provide key technical support in digital IC design implementation, product demonstration, and sales
Cadence Design Systems, Inc.
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. The STA Product Engineer plays a critical role in driving best‑in‑class timing analysis solutions by combining deep technical exp
