iconBackASIC Design Engineer/SoC Designer Poznan, Wroclaw, Gdansk, Katowice, GothenburgAre you passionate about revolutionizing hardware design? As an ASIC Design Engineer at Antmicro, you will join a team of innovators working on new desig
RTL / HDL jobs 3,287
Register-transfer-level and HDL design in Verilog, SystemVerilog, VHDL and Chisel.
Roles 2,251–2,280 of 3,287, newest first.
- Poznan, Wroclaw, Gdansk, Katowice, GothenburgRISC-VRTL / HDLVerificationAug 11, 2026
- Poznan, Wroclaw, Gdansk, GothenburgRISC-VRTL / HDLFirmwareAug 11, 2026
iconBackDigital design / FPGA Internships Poznan, Wroclaw, Gdansk, GothenburgWant to take FPGA programming to a whole new level? In our team, we develop advanced digital systems that combine custom FPGA logic with open-source software. Our
- Poznan, Wroclaw, Gdansk, Katowice, GothenburgRTL / HDLVerificationCompilersAug 11, 2026
iconBackDigital design/FPGA Engineer Poznan, Wroclaw, Gdansk, Katowice, GothenburgWant to take FPGA programming to a whole new level? We develop modern ASIC/FPGA systems composed of dedicated logic IP cores as well as the software controlli
- Poznan, Wroclaw, Gdansk, GothenburgRTL / HDLCompilersPhysical designAug 11, 2026
iconBackSoftware Engineer (chip design tools) Poznan, Wroclaw, Gdansk, GothenburgWant to shape the future of open source digital design? We work with the newest, bleeding-edge chip design technologies. We develop open source tooling for ASI
- 中国/北京RISC-VRTL / HDLFPGAAug 11, 2026
职位描述:1.深度参与芯片架构设计和spec定义;2.负责处理器的代码编写和相关代码的验证;3.与验证团队协作进行系统级仿真验证、覆盖率分析、FPGA验证、芯片调试;4.与测试团队协作进行可测性设计;5.配合后端团队进行时序调整,共同完成芯片物理实现及流片;6.负责设计文档的撰写。 任职要求:1.硕士及以上学历;2.具有数字设计相关经验、熟练使用verilog HDL或chisel语言,熟悉常用的EDA工具;3.熟悉数字电路设计流程,能独立完成设计;4.深刻理解高性能CPU
- 中国/北京RISC-VRTL / HDLFPGAAug 11, 2026
职位描述:1.负责处理器微架构的模块设计和代码编写2.负责模块级的功能验证和性能分析3.协助验证工程师进行系统级仿真验证、覆盖率分析、FPGA验证、芯片调试4.参与芯片架构设计和spec定义5.负责设计文档的撰写; 任职要求:1.硕士及以上学历;2.具有数字设计相关经验、熟练使用verilog HDL或chisel语言,熟悉常用的EDA工具;3.熟悉数字电路设计流程,能独立完成IP或模块的设计;4.熟悉CPU微体系结构;5.具有数字芯片开发和成功流片量产经验优先;6.有RI
- 中国/北京RTL / HDLFPGAAug 11, 2026
职位描述:1.负责处理器微架构的模块设计和代码编写2.负责模块级的功能验证和性能分析3.协助验证工程师进行系统级仿真验证、覆盖率分析、FPGA验证、芯片调试4.参与芯片架构设计和spec定义5.负责设计文档的撰写; 有以下经验优先:1.参与过具体CPU的开发2.参与过FPU的开发,熟悉IEEE754标准;3.参与过浮点加法器、乘法器设计,了解前导零预测电路、保留进位加法器等常用硬件算法;4.参与过浮点除法器设计,了解SRT算法等硬件算法;5.熟悉Chisel/Verilog
- 中国/北京RTL / HDLVerificationAug 11, 2026
岗位职责:1.根据芯片设计规范完成验证方案的制定,搭建模块级和系统级验证环境,进行覆盖率分析,根据分析结果提高验证覆盖率;2.负责UVM验证平台搭建,测试向量以及仿真模型的设计;3.制定并执行验证计划,编写验证用励,与设计工程师共同完成问题的调试;4.负责芯片SOC集成验证以及IP模块验证。 任职要求:1.硕士及以上学历;2.熟练使用verilog HDL语言;3.熟悉perl,shell等脚本;4.熟悉处理器架构及验证方法学;5.熟悉常用仿真EDA软件;6.具有较强的学习
CPU前端设计/验证实习生
Beijing Vcore Technology Co.,Ltd.
中国/北京RISC-VRTL / HDLVerificationAug 11, 2026职位描述:1.使用chisel/verilog语言进行CPU的开发2.负责使用前沿领域技术对模块级进行设计和性能分析3.协助验证工程师进行系统级仿真验证、覆盖率分析、FPGA验证、芯片调试4.参与芯片架构设计和spec定义5.负责设计文档的撰写 任职要求:1 理工科学生,公司提供CPU设计/验证以及前后端协同开发等相关知识的培训;2.具有积极主动的工作态度,具备较强的学习能力,良好的分析能力、解决问题能力、沟通能力和团队协作能力;3有志于在先进工艺下为高性能开源RISC-V
IC前端设计/验证实习生
Beijing Vcore Technology Co.,Ltd.
中国/北京RISC-VRTL / HDLVerificationAug 11, 2026职位描述:1.使用chisel/verilog语言进行处理器核的开发2.负责使用前沿领域技术对模块级进行设计和性能分析3.协助验证工程师进行系统级仿真验证、覆盖率分析、FPGA验证、芯片调试4.参与芯片架构设计和spec定义5.负责设计文档的撰写 • 任职要求: • 1 理工科学生,公司提供IC设计/验证以及前后端协同开发等知识的培训; • 2.具有积极主动的工作态度,具备较强的学习能力,良好的分析能力、解决问题能力、沟通能力和团队协作能力; • 3有志于在先进工艺下为高性
- 中国/北京RTL / HDLSoC / ASICAug 11, 2026
岗位职责:1、负责SoC系统设计,包括:定义spec、SoC集成、IP选型和RTL设计2、参与SoC的clock/reset/low power/debug设计3、负责逻辑综合、形式验证、STA等流程实现,负责前后端数据交互4、支持SoC验证和软件开发和调试 任职要求:1、微电子、计算机等相关专业本科及以上学历,3年及以上SOC设计经验2、熟悉SoC架构和顶层接口,有高性能或先进工艺SoC设计经验优先3、有扎实的RTL coding能力和设计经验4、熟悉DDR/PCIE/d
Senior CPU Microarchitecture & Logic Design Engineer
Ahead Computing
Guadalajara, MXRTL / HDLPhysical designAug 11, 2026We are seeking a Senior CPU Design Engineer to join our team. In this role, you will be responsible for designing and implementing high-performance execution units in CPU, optimizing for power, performance, and area (PPA). You will work clo
CPU Microarchitecture & Logic Design Engineer
Ahead Computing
Guadalajara, MXRTL / HDLPhysical designAug 11, 2026We are seeking a CPU Design Engineer to join our team. In this role, you will be responsible for designing and implementing high-performance execution units in CPU, optimizing for power, performance, and area (PPA). You will work closely wi
Formal Verification Engineer
Ahead Computing
Guadalajara, MXRISC-VRTL / HDLVerificationAug 11, 2026We are seeking a Formal Verification Engineer to join our team. In this role, you will leverage advanced formal verification techniques to ensure the correctness and performance of high-end RISC-V cores. You will collaborate closely with ar
Senior Physical Design Engineer – CPU PPA Optimization
Ahead Computing
Guadalajara, MXRTL / HDLPhysical designAug 11, 2026We are seeking a Physical Design Engineer to drive CPU power, performance, and area (PPA) optimization at advanced technology nodes. You will be responsible for physical implementation, collaborating with RTL, and logic design teams to deli
Senior Product Design Engineer
Alpha Design AI
San JoseRTL / HDLVerificationAug 10, 2026ABOUT CHIPAGENTS ChipAgents is revolutionizing chip design and verification with agentic-AI workflows. Founded by experts in AI and semiconductor design, we partner with top-10 semiconductor companies, hyperscale cloud providers, and cutti
- Santa Clara, California, United States; SpainRISC-VRTL / HDLCompilersAug 10, 2026
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software
Emulation Front-End Infrastructure Engineer
NVIDIA Corporation
US, CA, Santa ClaraRTL / HDLCompilersAug 10, 2026NVIDIA has been pioneering accelerated computing for more than two decades—from the invention of the GPU to breakthroughs in AI, high-performance computing, robotics, autonomous vehicles, and gaming. Our Emulation Infrastructure team builds
Senior ASIC Physical Design Engineer, Cache Coherent Interconnects
NVIDIA Corporation
US, CA, Santa Clara, US, OR, HillsboroRTL / HDLPhysical designSoC / ASICAug 10, 2026As a member of our CPU Cache Coherent Interconnects Design Team, you will be responsible for the physical design of CPU on-chip interconnect network and last-level caches, working on implementation, synthesis and timing closure while collab
Senior Chip Design Verification Engineer
NVIDIA Corporation
Israel, Tel Aviv, Israel, YokneamRTL / HDLVerificationAug 10, 2026NVIDIA is looking for best-in-class Chip Verification Engineers to join our outstanding Networking Silicon Engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest laten
ASIC Design Engineer - Hardware
NVIDIA Corporation
US, TX, AustinRTL / HDLPhysical designSoC / ASICAug 10, 2026Join the NVIDIA System-On-Chip (SOC) group as an ASIC Design Engineer and make a broad impact. You will focus on improving methodologies and delivering system-level IP to measure performance across multiple projects! NVIDIA has been transf
Principal Engineer, Project Management - Chip Design
NVIDIA Corporation
Israel, Tel AvivRTL / HDLVerificationFirmwareAug 10, 2026NVIDIA Switches ASIC group is seeking a top-tier ASIC technical manager to lead the development of our next-generation ASICs. Join us in shaping the future of technology! As an ASIC Project Lead, you will manage the pre-silicon development
STA Engineer
NVIDIA Corporation
Israel, Yokneam, Israel, Tel AvivRTL / HDLPhysical designAug 10, 2026NVIDIA is looking for best-in-class STA (Static Timing analysis) Physical Design Engineers to join our outstanding Networking DFT team, developing the industry's best high-speed communication devices, delivering the highest throughput and l
SOC Design Verification Engineer– Pre-Si/Post-Si Verification
Qualcomm Technologies, Inc.
Tijuana, Baja California, MexicoRTL / HDLVerificationFirmwareAug 10, 2026Company: QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary: Job Overview We are seeking motivated Engineer and Senior Engineer candidates
CPU Performance Modeling Engineer (Multiple Levels)
Qualcomm Technologies, Inc.
Santa Clara, California, United States of America, Austin, Texas, United States of AmericaRTL / HDLVerificationCompilersAug 10, 2026Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > CPU Architecture General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experi
GSoC Design Verification Engineer
Qualcomm Technologies, Inc.
San Diego, California, United States of AmericaRTL / HDLVerificationSoC / ASICAug 10, 2026Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary: Qualcomm is a company of inventors whose breakthrough innovations are accelerating progress in data center technolog
CPU STA/Timing Engineer (Lead/Staff/Sr Staff)
Qualcomm Technologies, Inc.
Bangalore, IndiaRTL / HDLPhysical designSoC / ASICAug 10, 2026Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation
ASIC Design Engineer
Qualcomm Technologies, Inc.
San Diego, California, United States of AmericaRTL / HDLVerificationPhysical designAug 10, 2026Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation exper
CPU Physical Design Engineer
Qualcomm Technologies, Inc.
Bangalore, IndiaRTL / HDLPhysical designFPGAAug 10, 2026Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation
Senior Verification Engineer
Mobileye Vision Technologies Ltd.
Haifa, IsraelRTL / HDLVerificationAug 9, 2026Mobileye’s Unit Level Verification Team in Haifa is looking for an experienced verification engineer to be involved in the development of Mobileye’s future AI and deep learning HW accelerators. This is an exciting opportunity to join a te