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芯片设计工程师(北京/上海/深圳)

Tencent Technology (Shenzhen) Co., Ltd.

深圳RTL / HDLPhysical designSoC / ASICFPGAPosted Aug 11, 2026
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Skills named in this posting

  • Verilog
  • VHDL
  • C
  • C++
  • Python
1.参与SoC/IP 系统/子系统的设计和实现; 2.负责模块架构设计、RTL实现、时序分析优化以及模块的PPA优化; 3.支撑 SoC/IP 的系统集成,以及文档编写; 4.与性能分析团队一起进行芯片性能改进; 5.与设计验证团队一起制定验证测试计划,覆盖率分析,芯片仿真以及调试。 1.微电子、集成电路、电子工程、计算机、通信专业硕士及以上学历; 2.熟悉数字电路设计原理和集成电路设计流程,了解ASIC/FPGA设计流程,包括逻辑综合、布局布线、时序分析和验证等; 3.良好的编程能力,熟练掌握至少一种硬件描述语言(如Verilog或VHDL),熟悉C/C++、Python或其他编程语言; 4.熟悉EDA工具(如Cadence、Synopsys或Mentor Graphics等)的使用; 5.熟悉数字电路设计技术,如处理器架构、存储器、总线接口等。

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Original posting: careers.tencent.com

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RISC-V ecosystem

Tencent Technology (Shenzhen) Co., Ltd. in the RISC-V ecosystem

RISC-V International: Premier TSC

Tencent Holdings Ltd. is a Chinese multinational technology and entertainment conglomerate and holding company headquartered in Shenzhen.

  • Tencent joined RISC-V International as China pushed for open-instruction-set alternatives (widely reported)
  • Its TencentOS Tiny IoT operating system is used on RISC-V MCUs, e.g. tutorials pairing TencentOS Tiny with the GD32V RISC-V MCU
  • Also participates in Chinese RISC-V community events such as the RISC-V Forum in Shenzhen

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