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Principal Software Engineer

Cadence Design Systems, Inc.

HSINCHURTL / HDLPhysical designPosted Nov 5, 2026
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Skills named in this posting

  • Place and route
  • C
  • C++
  • Python
  • Tcl
  • Perl
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Cadence Design Systems is looking for a highly motivated Principal Software Engineer to join the Innovus R&D team. Innovus is Cadence’s flagship digital implementation platform, enabling customers to design advanced semiconductor chips from RTL to GDSII. In this role, you will play a key technical role in the development of advanced routing technologies for digital physical design, with an emphasis on advanced bus routing and constrained routing, and routing quality of results. You will drive the design and development of sophisticated routing algorithms, tackle complex physical-design challenges in advanced semiconductor designs, and work closely with other R&D engineers to deliver scalable, robust, and high-quality solutions. Key Responsibilities • Architect, design, and implement algorithms for constrained routing and advanced bus routing • Develop and optimize algorithms for advanced bus routing and constrained routing • Drive routing solutions for complex pin-access, congestion, and multi-layer routing scenarios • Improve quality of results, runtime, scalability, and robustness of routing technologies • Provide technical leadership in analyzing and solving complex algorithmic, geometry, and routing problems • Collaborate with R&D and cross-functional teams to define technical requirements, drive solutions, and deliver production-quality features • Mentor junior engineers and contribute to the technical direction and long-term evolution of routing technologies Minimum Qualifications • MS or PhD in Computer Science, Electrical Engineering, Computer Engineering, or a related field • Strong expertise in C/C++, algorithms, data structures, and object-oriented software development • Experience developing complex, performance-critical software on Linux/UNIX platforms • Strong algorithmic problem-solving, debugging, and software-design skills • Ability to independently drive complex technical problems from problem definition through design, implementation, and validation • Strong communication skills and ability to work effectively across engineering teams Preferred Qualifications • Experience in VLSI CAD, physical design, routing, computational geometry, graph algorithms, or optimization • Knowledge of physical-design concepts such as routing layers, tracks, vias, blockages, pin access, congestion, and design rules • Experience developing large-scale EDA or algorithm-intensive software systems • Experience with routing algorithms, constrained optimization, geometry processing, or graph-based algorithms • Familiarity with scripting languages such as Tcl, Python, or Perl • Experience with commercial or academic place-and-route tools and physical-design flows Experience providing technical leadership or mentoring engineers on complex software projects We’re doing work that matters. Help us solve what others can’t.

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Original posting: cadence.wd1.myworkdayjobs.com

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RISC-V ecosystem

Cadence Design Systems, Inc. in the RISC-V ecosystem

RISC-V International: Strategic

Cadence is a leading provider of EDA and semiconductor IP.

  • EDA vendor active in RISC-V: supported NSITEXE (with Imperas) in developing RISC-V vector processor IP for automotive AI
  • Publishes RISC-V ecosystem commentary ("The State of the RISC-V Union", Paul McLellan) and RISC-V verification/emulation flows

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