Digital IP Engineer

Digital IP Engineer Location: Penang, Malaysia Responsibilities: • Work on the digital IP and/or it’s subsystem definition and development covering RTL creation, verification, and documentation for the IP and system developed. The IP could be either be hardened IP on silicon or provided as soft IP solution to customers. • Write design RTL code, and ensure design quality is met through lint, clock/power domain crossing and formal property checks. This includes writing timing constraints and UPF to ensure the design is synthesis clean to be handed to the physical design team. • Work on the design collaterals, e.g. timing libraries, verification models, design models and release these collaterals to the related teams • Create and execute the verification plan covering IP block to subsystem, using SystemVerilog and/or constrained random verification (UVM/OVM), assertion based verification and functional coverage techniques. This includes hands-on system validation of the design on hardware/development board. • Conduct results review against the coverage goals. Track and improve the tests to ensure the desired coverage is met. • Work with design and physical design team to harden the IP for IP develop for the hardware platform by providing fully verified IP which meeting the IP specification and necessary collateral, e.g. timing constraint, RTL netlist and etc. • Work with Application team in defining the soft IP specification and the complete design process. Productize the IP into Efinix’s EDA for external customer usage. • Support both internal and external customer’s inquiries and issues which related to the IP developed. Qualifications: • Bachelor’s or master’s degree in Engineering (Electronic/Computer Engineering) or equivalent. • 1-20 years of working experience in IC design and/or ASIC IP logic design and verification. • Experience in frontend design technique, e.g. RTL coding skills and languages including VHDL/Verilog. • Experience and knowledge in FPGA design and scripting (Perl/python/tcl/shell scripts/etc) is a plus. • Experience in IP integration in chip and/or subsystems.