HefeiRTL / HDLVerification2026-01-26
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DFT Engineer (Staff/Senior Staff Level)
MediaTek Inc
BangaloreRISC-V2026-01-24Video Encoder Digital Design Engineer
MediaTek Inc
HsinChuRTL / HDL2026-01-18Multimedia Digital IC Design Engineer
MediaTek Inc
HsinChu2026-01-13MCU/DSP Design Verification Engineer
MediaTek Inc
HsinChuVerification2025-12-30- BangaloreRTL / HDLVerification2025-12-21
Senior PDK Engineer
MediaTek Inc
HsinChu2025-12-14- Irvine, CA2025-12-11
Senior Staff/Staff Power Integrity Engineer
MediaTek Inc
San Jose, CASoC / ASIC2025-12-09Senior Digital Design Engineer - Ethernet MAC
MediaTek Inc
HsinChu2025-12-09- HsinChuFirmwarePhysical designFPGA2025-12-09
Senior Signal and Power Integrity Engineer
MediaTek Inc
HsinChu2025-12-09Senior Design Engineer - Die-to-Die Interface
MediaTek Inc
TaipeiFirmwarePhysical design2025-12-09- ChuPeiRTL / HDLVerificationPhysical design2025-12-07
- Palo Alto OfficeRTL / HDLVerification2025-11-12
Senior Chip Design Engineer
NVIDIA Corporation
Israel, Tel AvivRTL / HDLVerification2025-11-11Multimedia Digital IC Design Engineer_ChuPei
MediaTek Inc
ChuPeiRTL / HDL2025-11-10CPU Physical Design Engineer_HsinChu
MediaTek Inc
HsinChuRTL / HDLPhysical design2025-10-28- Milpitas2025-10-16
- Bangalore2025-10-15
IP DFT Engineer
MediaTek Inc
Austin, TXVerification2025-10-10- San Diego, CARTL / HDLCompilersSoC / ASIC2025-09-18
- SingaporePhysical design2025-09-16
Synthesis Engineer
MediaTek Inc
BangalorePhysical design2025-08-31Analog/Mixed-Signal Design Verification Engineer
MediaTek Inc
HefeiRTL / HDLVerification2025-07-23
