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4,415 results · page 20 of 177 · dates: UTC

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  Physical Implementation Engineer

  Semifive

  2026-10-20

  South KoreaRISC-VRTL / HDLCompilersPhysical design2026-10-20
• SS

  SoC验证主管

  Shanghai StarFive Semiconductor Co., Ltd.

  2026-10-20

  上海、成都VerificationSoC / ASIC2026-10-20
• SS

  SoC验证工程师

  Shanghai StarFive Semiconductor Co., Ltd.

  2026-10-20

  上海、成都RISC-VVerificationSoC / ASIC2026-10-20
• SS

  SoC芯片架构师

  Shanghai StarFive Semiconductor Co., Ltd.

  2026-10-20

  上海RISC-VPhysical designSoC / ASIC2026-10-20
• SS

  FPGA工程师

  Shanghai StarFive Semiconductor Co., Ltd.

  2026-10-20

  上海、成都RTL / HDLSoC / ASICFPGA2026-10-20
• SS

  软件工程师- Linux 方向

  Shanghai StarFive Semiconductor Co., Ltd.

  2026-10-20

  上海、成都、顺德RISC-VKernel / LinuxSoC / ASIC2026-10-20
• SS

  软件工程师 – Windows方向

  Shanghai StarFive Semiconductor Co., Ltd.

  2026-10-20

  上海、成都、顺德RISC-VKernel / LinuxSoC / ASIC2026-10-20
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  固件工程师

  Shanghai StarFive Semiconductor Co., Ltd.

  2026-10-20

  成都RISC-VFirmwareSoC / ASIC2026-10-20
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  Senior SOC Physical Design Engineer (India) – Next-Generation SOC Development

  Secqai

  2026-10-20

  Hybrid, BengaluruRISC-VPhysical designSoC / ASIC2026-10-20
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  Senior SoC Architect / Design Engineer – Next Generation Secure SoC Development

  Secqai

  2026-10-20

  London, Bristol, HybridRISC-VRTL / HDLPhysical designSoC / ASIC2026-10-20
• S

  Senior CPU Architect / Design Engineer - Next-Generation Processor Development

  Secqai

  2026-10-20

  London, Bristol, HybridRISC-VRTL / HDLPhysical designSoC / ASIC2026-10-20
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  SoC Analog Engineer – Next Generation Secure SoC Development

  Secqai

  2026-10-20

  London, Bristol, HybridRISC-VPhysical designSoC / ASIC2026-10-20
• S

  Senior SoC Analog Engineer – Next Generation Secure SoC Development

  Secqai

  2026-10-20

  London, Bristol, HybridRISC-VPhysical designSoC / ASIC2026-10-20
• S

  Senior Mixed Signal Engineer – Next Generation Secure SoC Development

  Secqai

  2026-10-20

  London, Bristol, HybridRISC-VVerificationSoC / ASIC2026-10-20
• S

  SoC Architect / Design Engineer – Next Generation Secure SoC Development

  Secqai

  2026-10-20

  London, Bristol, HybridRISC-VRTL / HDLPhysical designSoC / ASIC2026-10-20
• S

  CPU Architect / Design Engineer – Next-Generation Processor Development

  Secqai

  2026-10-20

  London, Bristol, HybridRISC-VRTL / HDLPhysical designSoC / ASIC2026-10-20
• 

  Technical Marketing

  S2C LIMITED

  2026-10-20

  上海SoC / ASIC2026-10-20
• 

  产品经理

  S2C LIMITED

  2026-10-20

  上海SoC / ASICFPGA2026-10-20
• 

  FPGA 原型工程师

  S2C LIMITED

  2026-10-20

  上海RTL / HDLSoC / ASICFPGA2026-10-20
• R

  ASIC backend designer (Graduate)

  Retym

  2026-10-20

  SoC / ASIC2026-10-20
• R

  VP/Sr. Director of Marketing – Coherent DSP ASIC

  Retym

  2026-10-20

  SoC / ASIC2026-10-20
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  ASIC Backend Engineer

  RaiderChip

  2026-10-20

  On-Site (Solares, Spain) • Full-timeRequirements: • Own the technical oversight of ASIC back-end executed by design service partners • Review, challenge, and validate P&R, timing closure, DRC/LVS, and sign-off results • Define and review backend constraints and deliverables • Strong understanding of physical design flows and trade-offs • Working experience with Synopsys tools • Proven experience with full ASIC tapeouts (strong plus)SoC / ASIC2026-10-20
• R

  ASIC Verification Engineer

  RaiderChip

  2026-10-20

  On-Site (Solares, Spain) • Full-timeRequirements: • Develop and execute comprehensive verification strategies for ASIC designs • Create simulation environments to aggressively validate functionality • Leverage existing FPGA-proven designs as reference and validation baseline • Strong experience with RTL simulation and verification methodologies • Working experience with Synopsys toolsVerificationSoC / ASIC2026-10-20
• NS

  ATE Test Engineer

  Nordic Semiconductor ASA

  2026-10-20

  TrondheimSoC / ASIC2026-10-20
• NS

  ASIC Digital Physical Design Engineer

  Nordic Semiconductor ASA

  2026-10-20

  Bristol, Stockholm, TamperePhysical designSoC / ASIC2026-10-20