Open Source Platform Architect
NVIDIA Corporation
US, CA, Santa Clara, US, CA, RemoteRemote2026-10-20
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MES Developer
Silicon Box
D18 Pasir Ris, Tampines2026-10-20Developer Technology Engineering Intern - Compute Performance
NVIDIA Corporation
Germany, Munich, France, Courbevoie, Germany, Wuerselen2026-10-20Senior Product Engineer
NVIDIA Corporation
Remote - ThailandRemote2026-10-20- Cannes, Alpes-Maritimes, France2026-10-20
STAGE - Ingénieur DevSecOps - IA H/F
Thales SA
Limours, Essonne, France2026-10-20- Cannes, Alpes-Maritimes, France2026-10-20
STAGE - Conception et développement de banc d'évaluations de différentes technologies decapteurs
Thales SA
La Ferté-Saint-Aubin, Loiret, France2026-10-20- Toulouse, Haute-Garonne, France2026-10-20
STAGE - Ingénieur DevOps - Conteneurisation, automatisation des tests Docker et CI-CD - F/H
Thales SA
Cholet, Maine-et-Loire, France2026-10-20- Toulouse, Haute-Garonne, France2026-10-20
- Élancourt, Yvelines, France2026-10-20
GenAI Algorithms Intern – Model Optimization for Inference
NVIDIA Corporation
Poland, Warsaw, Remote - PolandRemoteKernel / Linux2026-10-20Java Technical Architect with Fullstack Development (OnSite) - Cork, Ireland
Qualcomm Technologies, Inc.
Cork, Ireland2026-10-20Linux Kernel Development - Engineer, Staff
Qualcomm Technologies, Inc.
Hyderabad, Telangāna, IndiaKernel / LinuxFirmware2026-10-20OpenBMC工程师
Shanghai StarFive Semiconductor Co., Ltd.
上海、顺德、成都2026-10-20Senior Software Engineer
RaiderChip
On-Site (Solares, Spain) • Full-timeRequirements: • Mandatory expert-level Python and C • Minimum 8 years of professional software development experience • Design, implement, and maintain high-quality software components • Write efficient, clean, and maintainable code • Collaborate with hardware and systems teams • Ability to work independently and deliver reliably2026-10-20ASIC Backend Engineer
RaiderChip
On-Site (Solares, Spain) • Full-timeRequirements: • Own the technical oversight of ASIC back-end executed by design service partners • Review, challenge, and validate P&R, timing closure, DRC/LVS, and sign-off results • Define and review backend constraints and deliverables • Strong understanding of physical design flows and trade-offs • Working experience with Synopsys tools • Proven experience with full ASIC tapeouts (strong plus)SoC / ASIC2026-10-20ASIC Verification Engineer
RaiderChip
On-Site (Solares, Spain) • Full-timeRequirements: • Develop and execute comprehensive verification strategies for ASIC designs • Create simulation environments to aggressively validate functionality • Leverage existing FPGA-proven designs as reference and validation baseline • Strong experience with RTL simulation and verification methodologies • Working experience with Synopsys toolsVerificationSoC / ASIC2026-10-20Commercial Director - Europe
PragmatiC
Cambridge2026-10-20Ingeniero de Soporte
NEC Corporation
Buenos Aires, B, AR, 11562026-10-20- Sydney, NSW, AU, 20002026-10-20
Developer Advocate, IoT Security
Nordic Semiconductor ASA
Firmware2026-10-20Development Tools Engineering Director
Nordic Semiconductor ASA
Trondheim, KrakówCompilersFirmwareSoC / ASIC2026-10-20Business Development Manager, nRF Cloud Taipei, Taiwan
Nordic Semiconductor ASA
TaipeiFirmware2026-10-20
