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137 results · page 5 of 6 · dates: UTC

Staff Mixed Signal IC Design Engineer
Qualcomm Technologies, Inc.
2026-04-09
Hsinchu City, TaiwanRTL / HDLFirmwareSoC / ASIC2026-04-09
Senior Digital Design Verification Engineer - Hardware
NVIDIA Corporation
2026-04-08
US, CA, Santa ClaraRTL / HDLVerification2026-04-08
Senior CMOS analog/mixed signal design Engineer
FMC
2026-04-01
Dresden, Sachsen, DE; Agrate Brianza, IT; Grenoble, Auvergne-Rhône-Alpes, FRRTL / HDLVerification2026-04-01
Senior Mixed-Signal Design Engineer
NVIDIA Corporation
2026-03-10
US, CA, Santa ClaraRTL / HDLSoC / ASIC2026-03-10
Mixed Signal Design Validation Engineer
NVIDIA Corporation
2026-03-09
US, CA, Santa Clara2026-03-09
Mixed-Signal Digital IC Design Engineer(Serdes, High Speed Interface)
MediaTek Inc
2026-03-08
HsinChuRTL / HDLVerification2026-03-08
Senior Mixed Signal Design Engineer
NVIDIA Corporation
2026-03-04
US, CA, Santa ClaraRTL / HDL2026-03-04
Senior Mixed Signal Design Engineer
NVIDIA Corporation
2026-03-04
US, CA, Santa ClaraRTL / HDL2026-03-04
Senior Mixed Signal Design Validation Engineer
NVIDIA Corporation
2026-02-27
US, CA, Santa ClaraFirmware2026-02-27
Physical Design Engineer: Die-to-Die Interface (RTL to GDSII)
Tenstorrent
2026-02-26
Santa Clara, California, United StatesRISC-VRTL / HDLCompilersPhysical design2026-02-26
Senior High Speed SerDes Validation Engineer
NVIDIA Corporation
2026-02-11
US, CA, Santa Clara2026-02-11
Analog/Mixed-Signal Design Verification Engineer/Lead
MediaTek Inc
2026-01-26
HefeiRTL / HDLVerification2026-01-26
Analog ASIC Design Engineer
Ranovus
2026-01-13
RTL / HDLSoC / ASIC2026-01-13
Senior Mixed Signal Design Engineer
NVIDIA Corporation
2026-01-09
US, CA, Santa ClaraPhysical design2026-01-09
Senior Mixed Signal Design Engineer
NVIDIA Corporation
2026-01-09
US, CA, Santa ClaraRTL / HDLPhysical design2026-01-09
Senior Mixed Signal Design Validation Engineer
NVIDIA Corporation
2026-01-09
US, CA, Santa Clara2026-01-09
Senior Mixed Signal Design Engineer
NVIDIA Corporation
2026-01-09
US, CA, Santa ClaraPhysical design2026-01-09
Senior Analog and Mixed Signal Engineer
NVIDIA Corporation
2026-01-09
US, CA, Santa ClaraRTL / HDLPhysical design2026-01-09
Wireline Serdes Analog Mixed Signal Design Engineer
MediaTek Inc
2025-12-11
Irvine, CA2025-12-11
EDA CAD Engineer - Mixed Signal IC Design
OmniDesign
2025-11-04
HyderabadSoC / ASIC2025-11-04
Chip Lead: Analog & Mixed-Signal Layout Engineer
OmniDesign
2025-10-16
Milpitas2025-10-16
Chip Lead: Analog & Mixed-Signal Layout Engineer
OmniDesign
2025-10-15
Bangalore2025-10-15
Analog/Mixed-Signal Design Verification Engineer
MediaTek Inc
2025-07-23
HefeiRTL / HDLVerification2025-07-23
Analog Mixed-Signal Design Verification Engineer
MediaTek Inc
2025-07-17
BangaloreRTL / HDLVerificationSoC / ASIC2025-07-17
Systems & Applications Engineer – RF/ Analog-Mixed Signal
OmniDesign
2025-03-21
Bangalore2025-03-21