Senior Staff Field Applications Engineer (Analog & Power) - DACH - Demo
Renesas RISC-V 32 & 64-Bit MCUs and MPUs
Ottawa, caFirmwareSoC / ASIC2024-02-07
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Engineering Manager - Data Platform
Canonical Group Limited
Home based - Worldwide2024-02-02Functional Modeling Engineer
MediaTek Inc
Bangalore2024-02-01Design methodology engineer/technical manager
MediaTek Inc
HsinChuSoC / ASIC2024-01-30- HsinChuSoC / ASIC2024-01-30
- Vélizy-Villacoublay, Yvelines, France2024-01-30
Staff Electrical Engineer
Renesas RISC-V 32 & 64-Bit MCUs and MPUs
Zurich, chSoC / ASIC2024-01-24Script Pre-test
Renesas RISC-V 32 & 64-Bit MCUs and MPUs
Munich, BY, deSoC / ASIC2024-01-22Copy of Staff Electrical Engineer
Renesas RISC-V 32 & 64-Bit MCUs and MPUs
Paris, IDF, fr2024-01-11Offer Test - Job 3
Renesas RISC-V 32 & 64-Bit MCUs and MPUs
Hong Kong, hk2024-01-11- HsinChuVerification2024-01-03
PMIC Digital IC Design Engineer
MediaTek Inc
HsinChu2024-01-03- Dresden, DE (primary site)2023-12-24
Senior Juju Software Engineer (Go)
Canonical Group Limited
Home based - EMEAFirmware2023-12-13- SingaporeRTL / HDLVerification2023-12-12
Ubuntu Enablement Engineer
Canonical Group Limited
Office Based - Taipei, TaiwanRISC-VKernel / LinuxFirmware2023-12-11Software Engineer, Ubuntu Commercial Computers
Canonical Group Limited
Office Based - Beijing, China2023-12-11Senior Staff Analog Design Engineer
Renesas RISC-V 32 & 64-Bit MCUs and MPUs
Munich, BY, deRemoteSoC / ASIC2023-12-08Digital Verification Engineer
Renesas RISC-V 32 & 64-Bit MCUs and MPUs
Tokyo, Tokyo, jpRTL / HDLVerificationSoC / ASICSecurity2023-12-06Physical Design Engineer
MediaTek Inc
HsinChuPhysical design2023-12-03Senior Site Reliability / Gitops Engineer
Canonical Group Limited
Home based - WorldwideKernel / Linux2023-11-20Senior Security Operations Engineer
Canonical Group Limited
Home based - Worldwide2023-11-09Head of Security Operations
Canonical Group Limited
Home based - Worldwide2023-11-07- Maisons-Laffitte, Ile-de-France, FR; Castelldefels, Barcelona, ES; Grenoble, Auvergne Rhones Alpes, FR; Massy, Ile-de-France, FR; Bologna, ITCompilers2023-11-06
Design Verification Engineer
MediaTek Inc
BangaloreRISC-VRTL / HDLVerification2023-11-02
