数字前端设计工程师（校招）
Chipown
工作地点：苏州RTL / HDL2026-08-11
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数字前端实习生
Chipown
工作地点： 苏州RTL / HDL2026-08-11- RISC-VRTL / HDLSoC / ASICFPGA2026-08-11
- Zurich, CHRemoteRTL / HDL2026-08-11
ASIC / SoC Design Internships
Antmicro
Poznan, Wroclaw, Gdansk, GothenburgRISC-VRTL / HDLPhysical designSoC / ASIC2026-08-11- Poznan, Wroclaw, Gdansk, Katowice, GothenburgRISC-VRTL / HDLVerificationSoC / ASIC2026-08-11
- Poznan, Wroclaw, Gdansk, GothenburgRISC-VRTL / HDLFirmwareSoC / ASIC2026-08-11
Digital design/FPGA Engineer
Antmicro
Poznan, Wroclaw, Gdansk, Katowice, GothenburgRTL / HDLVerificationCompilersFirmware2026-08-11- Poznan, Wroclaw, Gdansk, GothenburgRTL / HDLCompilersPhysical designSoC / ASIC2026-08-11
前端设计高级工程师
Beijing Vcore Technology Co.,Ltd.
中国/北京RISC-VRTL / HDLFPGA2026-08-11前端设计工程师
Beijing Vcore Technology Co.,Ltd.
中国/北京RISC-VRTL / HDLFPGA2026-08-11浮点运算-前端设计
Beijing Vcore Technology Co.,Ltd.
中国/北京RTL / HDLFPGA2026-08-11IC验证工程师
Beijing Vcore Technology Co.,Ltd.
中国/北京RTL / HDLVerification2026-08-11CPU前端设计/验证实习生
Beijing Vcore Technology Co.,Ltd.
中国/北京RISC-VRTL / HDLVerificationFPGA2026-08-11IC前端设计/验证实习生
Beijing Vcore Technology Co.,Ltd.
中国/北京RISC-VRTL / HDLVerificationFPGA2026-08-11SOC设计工程师
Beijing Vcore Technology Co.,Ltd.
中国/北京RTL / HDLSoC / ASIC2026-08-11Senior CPU Microarchitecture & Logic Design Engineer
Ahead Computing
Guadalajara, MXRTL / HDLPhysical design2026-08-11CPU Microarchitecture & Logic Design Engineer
Ahead Computing
Guadalajara, MXRTL / HDLPhysical design2026-08-11Formal Verification Engineer
Ahead Computing
Guadalajara, MXRISC-VRTL / HDLVerification2026-08-11Senior Physical Design Engineer – CPU PPA Optimization
Ahead Computing
Guadalajara, MXRTL / HDLPhysical design2026-08-11Senior Product Design Engineer
Alpha Design AI
San JoseRTL / HDLVerification2026-08-10- Santa Clara, California, United States; SpainRISC-VRTL / HDLCompilersPhysical design2026-08-10
Emulation Front-End Infrastructure Engineer
NVIDIA Corporation
US, CA, Santa ClaraRTL / HDLCompilers2026-08-10Senior ASIC Physical Design Engineer, Cache Coherent Interconnects
NVIDIA Corporation
US, CA, Santa Clara, US, OR, HillsboroRTL / HDLPhysical designSoC / ASIC2026-08-10Senior Chip Design Verification Engineer
NVIDIA Corporation
Israel, Tel Aviv, Israel, YokneamRTL / HDLVerification2026-08-10
