Find work worth doing.

12 results · dates: UTC

• S

  Technical Engineering Intern - Design for Test (DFT) Internship

  Synopsys

  2026-10-22

  Ho Chi Minh City, VietnamCompilersSoC / ASIC2026-10-22
• V

  Design for Test (DFT) Engineer

  VoltAI

  2026-10-19

  Palo Alto OfficeRTL / HDLPhysical designSoC / ASIC2026-10-19
• MI

  Design-for-Test (DFT) Engineer – High-Performance CPU (New Grad)

  MediaTek Inc

  2026-10-19

  Austin, TX2026-10-19
• S

  FPGA Design and Test Engineer, Sr Staff

  Synopsys

  2026-10-08

  Sunnyvale, CaliforniaRTL / HDLPhysical designSoC / ASICFPGA2026-10-08
• NS

  Senior SOC Design For Test Engineer

  NXP Semiconductors Netherlands B.V.

  2026-10-06

  GrenobleRTL / HDLPhysical designSoC / ASIC2026-10-06
• N

  Design for Test Lead

  Neurophos

  2026-09-18

  Austin, TexasRTL / HDLCompilersPhysical designSoC / ASIC2026-09-18
• 

  Senior Design-for-Test Engineer, ATPG

  NVIDIA Corporation

  2026-06-01

  Israel, Tel Aviv, Israel, YokneamSoC / ASIC2026-06-01
• O

  Senior/Staff Design for Test Engineer

  Olix

  2026-05-27

  Austin, TXRTL / HDLFirmwarePhysical designSoC / ASIC2026-05-27
• E

  DFT (Design For Test) Engineer

  Etched

  2026-02-28

  San JoseRTL / HDLVerificationCompilersSoC / ASIC2026-02-28
• M

  Silicon Design-for-Test (DFT) Engineer

  Matx

  2024-12-19

  Mountain View (HQ) or RemoteRemoteCompilersFirmwareSoC / ASIC2024-12-19
• S

  Laboratory Engineer for Semiconductor Test & PCB Design

  Semron

  2024-03-15

  Dresden, DE (primary site)2024-03-15
• VI

  Senior DFT(Design for Test) Engineer

  VeriSilicon, Inc.

  2019-07-24

  ChengduPhysical design2019-07-24