SoC RTL Design Engineer (Staff/Senior Staff/ Principle)
Qualcomm Technologies, Inc.
Ho Chi Minh, Hồ Chí Minh, VietnamRTL / HDLVerificationFirmwarePhysical design2026-10-28
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RTL Design (SOC) Engineer-Principal/Manager
Qualcomm Technologies, Inc.
Bangalore, IndiaRTL / HDLPhysical designSoC / ASIC2026-10-27IP Micro-architect (RTL) design Engineer
Qualcomm Technologies, Inc.
Bangalore, IndiaRTL / HDLFirmwarePhysical designSoC / ASIC2026-10-21ASIC Verification Engineer
RaiderChip
On-Site (Solares, Spain) • Full-timeRequirements: • Develop and execute comprehensive verification strategies for ASIC designs • Create simulation environments to aggressively validate functionality • Leverage existing FPGA-proven designs as reference and validation baseline • Strong experience with RTL simulation and verification methodologies • Working experience with Synopsys toolsVerificationSoC / ASIC2026-10-20FPGA Engineer (Prototyping)
RaiderChip
On-Site (Solares, Spain) • Full-timeRequirements: • Use FPGA emulation to stress, debug, and validate ASIC-designs • Leverage long-running, proven FPGA prototypes as functional reference • Validate functionality through SW simulation and HW emulation • Collaborate closely with ASIC frontend and verification engineers • Drive issue detection, root-cause analysis, and fix validation • Strong experience with RTL simulation and FPGA toolchains (AMD/Xilinx)FPGA2026-10-20RTL Design Engineer
VoltAI
Palo Alto OfficeRTL / HDLVerificationPhysical design2026-10-19RTL Design(AI/ML) -Principal Engineer
Qualcomm Technologies, Inc.
Noida, Uttar Pradesh, IndiaRTL / HDLVerificationCompilers2026-10-13Senior ASIC RTL Design Engineer, AI Networking IP
Advanced Micro Devices (AMD)
OTTAWA, CanadaRTL / HDLVerificationPhysical designSoC / ASIC2026-10-09- San Diego, CARTL / HDLCompilersPhysical designSoC / ASIC2026-10-08
CPU Micro-architect/RTL Designer (Multiple Locations), Italy
Qualcomm Technologies, Inc.
Rome RM, Roma, Italy, Turin, Torino, ItalyRTL / HDLVerificationPhysical designSoC / ASIC2026-10-08RTL2GDS IC Sr. Principal Design Engineer
Cadence Design Systems, Inc.
SAN JOSERTL / HDLCompilersPhysical designSoC / ASIC2026-09-24RTL / Circuit IP Design Engineer
Advanced Micro Devices (AMD)
San Jose, CaliforniaRTL / HDLVerificationFirmware2026-09-14CPU Micro-architect/RTL Designer (Multiple Locations)
Qualcomm Technologies, Inc.
Austin, Texas, United States of America, Santa Clara, California, United States of AmericaRTL / HDLVerificationPhysical design2026-08-30Principal RTL Design Engineer
SambaNova
Austin, Texas, United States; San Jose, California, United StatesRTL / HDLVerificationPhysical designSoC / ASIC2026-08-19Principal PCIe CXL RTL Design Engineer
Rambus Inc.
FR-Aix-en-Provence | BG-SOFIA | US-OR-Hillsboro | IN-KA-BangaloreRTL / HDL2026-08-11- Zurich, CHRemoteRTL / HDL2026-08-11
RTL IP Design Engineer
Advanced Micro Devices (AMD)
Hyderabad, IndiaRTL / HDLFirmwarePhysical design2026-08-06RTL Design (Infra/NOC/SMMU/DDR/Peripherals)
Qualcomm Technologies, Inc.
Bangalore, IndiaRTL / HDLVerificationSoC / ASICFPGA2026-08-05Sr. RTL IP Design Engineer
Advanced Micro Devices (AMD)
Hyderabad, IndiaRTL / HDLFirmwarePhysical design2026-07-21RTL Design(Peripheral)-Sr Staff
Qualcomm Technologies, Inc.
Bangalore, IndiaRTL / HDLFPGA2026-07-15Principal Cache RTL Design - CPU Team
Advanced Micro Devices (AMD)
Bangalore, IndiaRTL / HDLVerificationFirmwarePhysical design2026-06-17Senior RTL Engineer/Lead
MediaTek Inc
Austin, TXRTL / HDLPhysical design2026-04-14- BangaloreRTL / HDLPhysical designSoC / ASIC2026-02-19
- RTL / HDLVerificationCompilersPhysical design2025-01-27
