Summary As the Design Lead, you will spearhead the design and development of high-performance PMIC products. You will lead a multidisciplinary team to define chip architectures, oversee mixed-signal implementation, and ensure successful ta
Celera 4 open roles
Automated analog/mixed-signal IC development tool · EDA · US · founded 2018
Overview
Celera hiring right now
- Open roles
- 4
Disciplines
Skills named most
- Mixed-signal4
- Verilog3
- SystemVerilog2
- DFT1
- I2C / UART1
- Logic synthesis1
- Microarchitecture1
- Python1
Counted from this company's open roles on this board on 28 Oct 2026. Added means first seen on this board.
- RTL / HDLOct 20, 2026
- RTL / HDLOct 20, 2026
Summary: We are looking for a Senior Power Management IC (PMIC) Analog Design Engineer to join our team. In this role, you will work on the architecture and design of high-performance analog and mixed-signal power chips. You will own compl
- RTL / HDLCompilersFirmwareOct 20, 2026
Summary As the Digital Design Lead, you will be responsible for the digital architecture, RTL implementation, and system integration of Power Management ICs. Key Responsibilities • Digital Architecture: Define and document the micro-arch
- Oct 20, 2026
Summary: This is an Applications Engineering position requiring a strong academic background in power electronics to support our Design team in designing cutting-edge power management solutions with our revolutionary, automated mixed-signa