Date Posted: 2026-10-21 Country: United States of America Location: US-TX-MCKINNEY-513WC ~ 2501 W University Dr ~ WING C BLDG Position Role Type: Onsite U.S. Citizen, U.S. Person, or Immigration Status Requirements: The ability to obtai
Physical design jobs 2,028
Physical design, place-and-route, timing closure and backend flows.
Roles 121–150 of 2,028, newest first.
- US-TX-MCKINNEY-513WC ~ 2501 W University Dr ~ WING C BLDGRTL / HDLVerificationFirmwareOct 22, 2026
Design Engineer Intern
Marvell Asia PTE Ltd
YokneamRTL / HDLFirmwarePhysical designOct 22, 2026About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new pos
Advanced Package Architect Sr. Staff Engineer
Marvell Asia PTE Ltd
BangalorePhysical designOct 22, 2026About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new pos
Package Layout Design Staff/Senior Staff Engineer
Marvell Asia PTE Ltd
BangalorePhysical designSoC / ASICOct 22, 2026About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new pos
Advanced Packaging Design - SI/PI Engineer
Marvell Asia PTE Ltd
Westborough, MAPhysical designOct 22, 2026About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new pos
Principal Hardware Engineer - 3rd Party IP Engineer
Marvell Asia PTE Ltd
Morrisville, NCVerificationPhysical designSoC / ASICOct 22, 2026About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new pos
Product Engineering Architect – High-Speed IP PHY
Cadence Design Systems, Inc.
GYEONGGI-DO (Seoul)RTL / HDLPhysical designSoC / ASICOct 22, 2026At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Position Overview Join a growing and dynamic IP team developing best-in-class digital and mixed-signal IP solutions. This role f
Senior Digital Design Engineer
Analog Devices, Inc.
United Kingdom, Edinburgh, SC, FreerRTL / HDLFirmwarePhysical designOct 22, 2026About Analog Devices Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technolog
FY27 Intern - Camera Design Implementation Intern - Canada (16 months)
Qualcomm Technologies, Inc.
Vancouver, British Columbia, CanadaRTL / HDLVerificationPhysical designOct 22, 2026Company: Qualcomm Canada ULC Job Area: Interns Group, Interns Group > Interim Engineering Intern - Systems Qualcomm Overview: Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity an
Lead Layout Engineer
Qualcomm Technologies, Inc.
Bangalore, IndiaPhysical designOct 22, 2026Company: Qualcomm India Private Limited Job Area: Engineering Services Group, Engineering Services Group > Layout Engineer General Summary: Develops block, macro, or chip level layouts and floorplans according to project requirements, sp
ASIC Design Engineer – SoC Interconnect, Cache & Memory Systems
Qualcomm Technologies, Inc.
San Diego, California, United States of AmericaRTL / HDLVerificationPhysical designOct 22, 2026Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary: At Qualcomm, we believe in the power of technology. For decades, our innovations have transformed industries, improv
NPU RTL Design Engineer
Qualcomm Technologies, Inc.
San Diego, California, United States of AmericaRTL / HDLVerificationPhysical designOct 22, 2026Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > DSP Architecture and Design General Summary: A variety of high performance, low power Hexagon/NPU cores are at the heart of Qualcomm’s multi-tier mobil
RF IC Designers
Nordic Semiconductor ASA
Lund, StockholmPhysical designOct 22, 2026We are expanding our RF team and are looking for talented engineers who are passionate about radio technology. The responsibilities listed below reflect the broad scope of our RF design activities. Individual roles will cover a subset of th
Senior SoC Design Lead
Nordic Semiconductor ASA
Oulu, TampereRTL / HDLPhysical designSoC / ASICOct 22, 2026About the job In this role you will lead the team that takes Nordic's next-generation microcontroller and wireless SoCs from architecture and specification to tape-out and production. You own SoC-level design and integration, set the techn
Senior Analog SoC Architect
Nordic Semiconductor ASA
Oulu, TamperePhysical designSoC / ASICOct 22, 2026About the job As Senior Analog Architect you define the analog and mixed-signal architecture of Nordic's next-generation Microcontroller and Wireless SoCs. You turn system requirements into architectures and specifications, set the technic
Senior FPGA Engineer
Synopsys
Moreira, PortugalRTL / HDLVerificationCompilersOct 22, 2026Date posted 10/20/2026 Category Engineering Hire Type Employee Job ID 19239 Remote Eligible No Date Posted 10/20/2026 We AreSynopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovat
- Sunnyvale, CaliforniaCompilersPhysical designOct 22, 2026
Date posted 10/20/2026 Category Engineering Hire Type Employee Job ID 19231 Base Salary Range $138000-$207000 Remote Eligible No Date Posted 10/20/2026 We AreSynopsys is the leader in engineering solutions from silicon to systems, en
RTL Design Engineer
Advanced Micro Devices (AMD)
MARKHAM, CanadaRTL / HDLVerificationPhysical designOct 21, 2026ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every
Senior VLSI Design Engineer
CEVA, Inc.
Ra'anana, Israel (IL)RTL / HDLPhysical designSoC / ASICOct 21, 2026Description About the Business Unit Ceva is at the forefront of next-generation cellular communication systems. We build licensable 5G modem IP for User Equipment (UE) and base stations, from IoT-class devices to high-throughput infrastru
CPU Core RTL Design Engineer
Advanced Micro Devices (AMD)
Austin, TexasRTL / HDLVerificationPhysical designOct 21, 2026ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every
ASIC Design Engineer, PCIe IP Enablement
Advanced Micro Devices (AMD)
MARKHAM, CanadaRTL / HDLPhysical designSoC / ASICOct 21, 2026ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every
Logic Design Engineer
Microsoft Corporation
United States, North Carolina, Raleigh, United States, Texas, Austin, United States, Oregon, Hillsboro, United States, California, Mountain ViewRTL / HDLPhysical designSoC / ASICOct 21, 2026Overview Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission. SCHIE delivers the core
PLL Design/ Integration Sr Staff Engineer
Advanced Micro Devices (AMD)
San Jose, CaliforniaRTL / HDLPhysical designSoC / ASICOct 21, 2026ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every
Core RTL/Microarchitecture Power Lead
Advanced Micro Devices (AMD)
Santa Clara, CaliforniaRTL / HDLVerificationPhysical designOct 21, 2026ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every
Interconnect Micro-Architect and Design Development Lead
Advanced Micro Devices (AMD)
Austin, TexasRTL / HDLPhysical designSoC / ASICOct 21, 2026ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every
(Sr.) Tape Out Engineer
NXP Semiconductors Netherlands B.V.
SingaporePhysical designOct 21, 2026Tape Out Engineer Job Description Role Overview, Responsibilities, and Qualifications The Tape Out Engineer plays a crucial role in the semiconductor design process, serving as the final checkpoint before integrated circuit designs are se
Senior Staff Digital Design Engineer
Marvell Asia PTE Ltd
Irvine, CARTL / HDLVerificationPhysical designOct 21, 2026About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new pos
Physical Design and Signoff, Sr. Principal AE
Cadence Design Systems, Inc.
SAN JOSEPhysical designOct 21, 2026At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. As an expert Digital Implementation and Signoff Field Applications Engineering (AE) , you will work side-by-side with our leading
RTL2GDS Lead AE
Cadence Design Systems, Inc.
SAN JOSEPhysical designOct 21, 2026At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Job Description As an expert Digital Implementation and Signoff Field Applications Engineering (AE) , you will work side-by-side
Lead Product Engineer
Cadence Design Systems, Inc.
SAN JOSERTL / HDLPhysical designOct 21, 2026At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. High-performance and Power-Critical CPU and/or GPU Implementation and Methodology Engineer Responsibilities / Skills · Full-chi