Physical design, place-and-route, timing closure and backend flows.
Roles 211–240 of 2,028, newest first.
Semifive
Job Purpose As a DFT Implementation Engineer, you will participate in SCAN insertion, ATPG, BIST/BIRA insertion, advanced DFT (3D-IC, ISO26262), hierarchical DFT flow, and TOP DFT architecture design. You will also be involved in yield imp
岗位职责： 1.参与芯片的应用场景分析，完成市场调研和竞分；提取芯片的系统需求，定义SoC的规格和PPA要求； 2.参与SoC系统设计，负责性能分析、低功耗设计、IP选型、Floorplan等； 3.参与关键子系统的分析和架构定义，包括DDR子系统、PCIe子系统、安全子系统、总线等； 4.协同前端、后端、验证、软件等同事，确保芯片架构的正确实现。 任职要求： 1.电子、通信、计算机等相关专业硕士或以上学历（优先）； 2.具备3年以上的IP设计或SoC集成经验；
岗位职责： 1.负责CPU具体模块的电路设计，比如执行单元； 2.配合DV做好功能的收敛； 3.与架构组协同工作负责微架构的迭代，优化PPA能够达到设计要求。 任职要求： 1.熟练掌握RTL代码书写，精通system verilog等HDL语言； 2.掌握必要的EDA工具，以及熟练运用Linux环境与脚本完成必要的开发工作； 3.对计算机体系结构基本必要的理解，尤其对于基本的CPU的流水线，以及乱序执行等基本结构； 4.能够团队协作，有效配合DV和架构的deb
(Hybrid, Bengaluru)Overview • We’re excited to be expanding our operations to India, as well as our Hardware Engineering team and are looking for a Senior SOC Physical Design Engineer who is interested in working with pioneers who work at t
(Hybrid, London / Bristol) Overview • We’re excited to be expanding our Hardware Engineering team and are looking for a SoC Architect / Design Engineer who is interested in working with pioneers who work at the intersection of secure Semico
(Hybrid, London / Bristol) Overview • We’re excited to be expanding our Hardware Engineering team and are looking for a Senior CPU Architect / Design Engineer who is interested in working with pioneers who work at the intersection of secur
(Hybrid, London / Bristol)Overview • We’re excited to be expanding our Hardware Engineering team and are looking for a SoC Analog Engineer who is interested in working with pioneers who work at the intersection of secure Semiconductors, Qua
(Hybrid, London / Bristol) Overview • We’re excited to be expanding our Hardware Engineering team and are looking for a Senior SoC Analog Engineer who is interested in working with pioneers who work at the intersection of secure Semiconduct
(Hybrid, London / Bristol) Overview • We’re excited to be expanding our Hardware Engineering team and are looking for a SoC Architect / Design Engineer who is interested in working with pioneers who work at the intersection of secure Semico
(Hybrid, London / Bristol)Overview • We’re excited to be expanding our Hardware Engineering team and are looking for a CPU Architect / Design Engineer who is interested in working with pioneers who work at the intersection of secure Semicon
Nordic Semiconductor ASA
About the job In this role, you will play a key role in developing the next generation of advanced semiconductor solutions, taking ideas from architecture and specification through transistor-level CMOS design, verification, and chip integ
Nordic Semiconductor ASA
About the job As a Physical Design Engineer, you will play a key role in transforming advanced semiconductor designs into high-performance, manufacturable silicon products. Working at the heart of the chip implementation flow, you will dri
Nordic Semiconductor ASA
About the job We are looking to recruit both talented and experienced engineers with knowledge of synthesis and static timing analysis (STA). As part of the Wi-Fi SoC group you will work closely with our Chip Synthesis and Static Check (CS
Nordic Semiconductor ASA
About the job As a ASIC RTL Design Engineer at Nordic Semiconductor, you will play an important role in developing the next generation of cutting-edge Wi-Fi SoCs that power connected devices around the world. You will be working on digital
Nordic Semiconductor ASA
About the job In this job you will play a key role in developing the next generation of advanced semiconductor solutions, taking ideas from architecture and specification through transistor-level CMOS design, verification, and chip integra
Mobilint
Role Summary 고성능·저전력 AI 반도체를 위한 NPU Architect는 차세대 AI Workload의 연산 특성을 정량적으로 분석하고, 이를 최적으로 수용하는 NPU Architecture를 정의하는 역할을 수행합니다. Compute Datapath, Memory Hierarchy, Interconnect, ISA에 이르는 NPU 전반의 구조를 설계하며, PPA(Performanc
Mobilint
Role Summary NPU RTL Engineer는 NPU의 핵심 Datapath 및 Control Logic을 설계하고, PPA(Performance/Power/Area) 목표를 충족하는 합성 가능한 고품질 RTL을 구현합니다. Architecture, DV, Physical Design 등 다양한 직군과 협업하며, RTL 작성 단계부터 Synthesis, Timing Closure,
Mobilint
Role Summary 고성능·저전력 AI 반도체의 시스템 설계를 총괄하는 SoC Architect는 NPU를 포함한 AP, DDR, Bus, PCIe, USB, Camera, Display 등 SoC 전체 아키텍처를 정의하고, Compute-Memory-Bus 구조를 통합적으로 설계합니다. 다양한 시스템 구성 요소를 유기적으로 연결하고 Software Stack과의 Co-design을 통
Role Summary “다음 AI Chip은 어떤 Chip이어야 하는가?” 이 질문에 답하고, 그 답을 실제 Silicon으로 만들어낼 인재를 찾습니다. AI SoC Product Architect / Product Planning은 Target Application과 AI Workload를 바탕으로 AI 반도체를 정의하고, 실제 Silicon으로 구현되기까지 제품 전반의 기술적 의사결
About the role • We are seeking an experienced Front-end Digital Design Engineer to join our Sunnyvale based team. The ideal candidate will have a strong background in Embedded and Mixedmode SoC architectures, Verilog, and Synthesis in dee
About the role • We are seeking an experienced Package Substrate Design Engineer to join us and own package and substrate design for the chips and multi-die modules at the heart of Lyte’s fully vertically integrated 4D FMCW LiDAR platform -
Position Overview MangoBoost is actively seeking for highly skilled and motivated IP Design Engineers to join our hardware development group. We are recruiting across multiple specialization tracks — Digital Hardware IP Des
Position Overview MangoBoost is actively seeking a highly skilled and motivated FPGA Engineer to join our Hardware Development Group. In this role, you will be responsible for FPGA IP integration, synthesis, timing closure
Maven Silicon Softech Private Limited
Open positions : 6 Experience : 3-8 years Education : M.Tech VLSI/BE ECE Industry Type : Education/E-Learning/Semiconductor Job Type : Training Job Description • Extensive hands on and teaching experience on Digital/SV/UVM/Verilog/VHD
Alternate Job Titles • Applications Engineer, EDA Tools • Customer Support Engineer, Physical Design • Technical Applications Engineer, ASIC Implementation • Field Applications Engineer, Design Implementation • Solutions Engineer, Physical
Alternate Job Titles • Applications Engineer, EDA Tools • Customer Support Engineer, Physical Design • Technical Applications Engineer, ASIC Implementation • Field Applications Engineer, Design Implementation • Solutions Engineer, Physical
International Business Machines Corporation
Physical design team is responsible for designing high performance microprocessor blocks for IBM Power and z mainframe servers. As a Hardware Developer at IBM, you'll get to work on the systems that are driving the quantum revolution and th
International Business Machines Corporation
At IBM Infrastructure & Technology, we design and operate the systems that keep the world running. From high-resiliency mainframes and hybrid cloud platforms to networking, automation, and site reliability. Our teams ensure the performance,
