About GlobalFoundries: GlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world’s most inspired technology companies. With a global
RISC-V jobs 790
Roles working directly on the RISC-V ISA, cores, extensions and ecosystem.
Roles 451–480 of 790, newest first.
- Richardson, Texas, United States of AmericaRISC-VRTL / HDLVerificationAug 11, 2026
- SHANGHAI, Shanghai, China, Shenzhen, Guangdong, China, BEIJING, Beijing, ChinaRISC-VAug 11, 2026
About GlobalFoundries GlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world’s most inspired technology companies. With a global
Senior Design Engineer-CPU
NextSilicon
IsraelRISC-VSoC / ASICFPGAAug 11, 2026Description NextSilicon is a swiftly growing unicorn startup that is reimagining high-performance computing. Our pioneering RISC-V and accelerator coprocessor vastly accelerates supercomputers, driving them forward into a new generation. O
- SerbiaRISC-VKernel / LinuxAug 11, 2026
Description NextSilicon is a swiftly growing unicorn startup that is reimagining high-performance computing. Our pioneering RISC-V and accelerator coprocessor vastly accelerates supercomputers, driving them forward into a new generation. O
Senior/Principal Rust Engineer
lowRISC / lowRISC C.I.C.
Cambridge, United KingdomRISC-VCompilersFirmwareAug 11, 2026At lowRISC we believe that open source development can transform the semiconductor industry. To help achieve this vision of production-ready, commercial-grade chips and silicon building blocks, we employ a software team with a wide range of
Senior/Principal Software Engineer
lowRISC / lowRISC C.I.C.
Cambridge, United KingdomRISC-VCompilersFirmwareAug 11, 2026At lowRISC we believe that open source development can transform the semiconductor industry. To help achieve this vision of production-ready, commercial-grade chips and silicon building blocks, we employ a software team with a wide range of
Speculative applications
lowRISC / lowRISC C.I.C.
Cambridge, Cambridgeshire, United KingdomRISC-VVerificationCompilersAug 11, 2026The Role We welcome speculative applications from skilled applicants who can bring something to our work. If none of the specific role categories listed is a fit for your skills and experience, you are welcome to apply here. Please set out
中国科学院计算技术研究所2026年度招聘
Institute of Computing Technology
RISC-VSoC / ASICFPGAAug 11, 2026• 首页 >> 人才招聘 中国科学院计算技术研究所2026年度招聘 中国科学院计算技术研究所(简称计算所)创建于1956年,是中国第一个专门从事计算机科学技术综合性研究的学术机构,是我国计算机事业的摇篮。先后为国家培养了几百名我国最早的计算技术专业人员,在这里工作或学习过的院士有二十余位。随着学科与技术发展,从计算所陆续分离出西安微电子所、计算中心、软件所、网络中心、微电子所和信工所等多个研究机构,孵化了联想、曙光、龙芯、寒武纪等高技术企业。计算所是国务院学位委员会批准的
中国科学院计算技术研究所2025年度招聘
Institute of Computing Technology
RISC-VSoC / ASICFPGAAug 11, 2026• 首页 >> 人才招聘 中国科学院计算技术研究所2025年度招聘 研究所概况中国科学院计算技术研究所(简称计算所)创建于1956年,是中国第一个专门从事计算机科学技术综合性研究的学术机构,是我国计算机事业的摇篮。先后为国家培养了几百名我国最早的计算技术专业人员,在这里工作或学习过的院士有二十余位。随着学科与技术发展,从计算所陆续分离出西安微电子所、计算中心、软件所、网络中心、微电子所和信工所等多个研究机构,孵化了联想、曙光、龙芯、寒武纪等高技术企业。计算所是国务院学位委
Kernel Developer
Igalia, S.L.
RISC-VKernel / LinuxAug 11, 2026Working at Igalia Open Positions Igalia Coding Experience Kernel Developer Description Igalia’s kernel team works in multiple subsystems in the kernel. Ranging from graphics (DRM) to schedulers, from block layer and file systems to memor
- RISC-VFirmwareAug 11, 2026
Project Leader Embedded Systems* Project ManagementResponsible planning, management, and leadership - Implementing projects with internal and external partners. Strong communication skills and a clear focus on project goals! Would you lik
Software Engineer for SoC Modeling and Runtime Systems
Fondazione Chips-IT
RISC-VCompilersKernel / LinuxAug 11, 2026Software Engineer for SoC Modeling and Runtime Systems Apply through LinkedIn The position in brief Job title: Software Engineer for SoC Modeling and Runtime Systems Workplace: Pavia/Bologna, Italy Deadline: 12.05.2026 How to apply: A
Junior Digital Design and RISC-V Architectures Engineer
Fondazione Chips-IT
RISC-VRTL / HDLFirmwareAug 11, 2026Junior Digital Design and RISC-V Architectures Engineer Apply through LinkedIn The position in brief Job title: Junior Digital Design and RISC-V Architectures Engineer Workplace: Pavia/Bologna, Italy Deadline: 12.05.2026 How to apply:
嵌入式软件开发工程师(校招)
Chipown
工作地点:苏州RISC-VFirmwareFPGAAug 11, 20261)负责基于ARM Cortex-M、RISC-V或其他内核的数字电源芯片底层驱动代码(Driver)及应用层固件(Firmware)的设计、编写与调试; 2)实现数字电源常用的通信协议(如PMBus、I2C、SPI、UART等);编写系统状态机、故障保护逻辑及电源管理调度代码; 3)与AE(应用工程师)或算法工程师配合,将数字控制算法(如PID补偿控制)转化为高效的C/C++代码并固化到芯片或MCU中; 4)配合数字IC设计团队、测试团队进行FPGA平台验证和芯片回片
- RISC-VRTL / HDLSoC / ASICAug 11, 2026
[ CDI ] – Ingénieur FPGA– IA embarquée & Architectures numériques avancées (H/F) VOS MISSIONS Vous rejoignez une équipe R&D impliquée dans un programme ambitieux de conception d’ASIC dédié à l’intelligence artificielle embarquée, mené avec
- Poznan, Wroclaw, Gdansk, GothenburgRISC-VRTL / HDLPhysical designAug 11, 2026
iconBackASIC / SoC Design Internships Poznan, Wroclaw, Gdansk, GothenburgAre you passionate about revolutionizing hardware design? Antmicro’s team of ASIC Designers is made up of innovators working on new designs and tooling for state-of-th
- Poznan, Wroclaw, Gdansk, Katowice, GothenburgRISC-VRTL / HDLVerificationAug 11, 2026
iconBackASIC Design Engineer/SoC Designer Poznan, Wroclaw, Gdansk, Katowice, GothenburgAre you passionate about revolutionizing hardware design? As an ASIC Design Engineer at Antmicro, you will join a team of innovators working on new desig
Account Coordinator
Antmicro
Poznan, Wroclaw, Gdansk, GothenburgRISC-VSoC / ASICFPGAAug 11, 2026iconBackAccount Coordinator Poznan, Wroclaw, Gdansk, GothenburgDo you wish to shape the future of computing systems? Join the Antmicro team and take responsibility for maintaining great working relationships with our clients with a particul
- Poznan, Wroclaw, Gdansk, GothenburgRISC-VRTL / HDLFirmwareAug 11, 2026
iconBackDigital design / FPGA Internships Poznan, Wroclaw, Gdansk, GothenburgWant to take FPGA programming to a whole new level? In our team, we develop advanced digital systems that combine custom FPGA logic with open-source software. Our
- Poznan, Wroclaw, Gdansk, GothenburgRISC-VCompilersKernel / LinuxAug 11, 2026
iconBackOpen Source C / Rust Engineer Poznan, Wroclaw, Gdansk, GothenburgWant to revolutionize IoT development? In our team we develop Renode - an open source development framework for embedded systems that allows you to emulate complicated
- Poznan, Wroclaw, Gdansk, GothenburgRISC-VSoC / ASICFPGAAug 11, 2026
iconBackOpen Source Software Internships Poznan, Wroclaw, Gdansk, GothenburgIt’s never too early to start your professional career. If you are technically-minded and, like us, passionate about open source, then this is the opportunity for y
- Poznan, Wroclaw, Gdansk, GothenburgRISC-VSoC / ASICFPGAAug 11, 2026
iconBackOpen Source Technical Writer Poznan, Wroclaw, Gdansk, GothenburgDo you wish to shape the future of open computing systems? Join Antmicro's marketing team to help create high-quality technical writing content for global open source i
- 中国/北京RISC-VRTL / HDLFPGAAug 11, 2026
职位描述:1.深度参与芯片架构设计和spec定义;2.负责处理器的代码编写和相关代码的验证;3.与验证团队协作进行系统级仿真验证、覆盖率分析、FPGA验证、芯片调试;4.与测试团队协作进行可测性设计;5.配合后端团队进行时序调整,共同完成芯片物理实现及流片;6.负责设计文档的撰写。 任职要求:1.硕士及以上学历;2.具有数字设计相关经验、熟练使用verilog HDL或chisel语言,熟悉常用的EDA工具;3.熟悉数字电路设计流程,能独立完成设计;4.深刻理解高性能CPU
- 中国/北京RISC-VRTL / HDLFPGAAug 11, 2026
职位描述:1.负责处理器微架构的模块设计和代码编写2.负责模块级的功能验证和性能分析3.协助验证工程师进行系统级仿真验证、覆盖率分析、FPGA验证、芯片调试4.参与芯片架构设计和spec定义5.负责设计文档的撰写; 任职要求:1.硕士及以上学历;2.具有数字设计相关经验、熟练使用verilog HDL或chisel语言,熟悉常用的EDA工具;3.熟悉数字电路设计流程,能独立完成IP或模块的设计;4.熟悉CPU微体系结构;5.具有数字芯片开发和成功流片量产经验优先;6.有RI
CPU前端设计/验证实习生
Beijing Vcore Technology Co.,Ltd.
中国/北京RISC-VRTL / HDLVerificationAug 11, 2026职位描述:1.使用chisel/verilog语言进行CPU的开发2.负责使用前沿领域技术对模块级进行设计和性能分析3.协助验证工程师进行系统级仿真验证、覆盖率分析、FPGA验证、芯片调试4.参与芯片架构设计和spec定义5.负责设计文档的撰写 任职要求:1 理工科学生,公司提供CPU设计/验证以及前后端协同开发等相关知识的培训;2.具有积极主动的工作态度,具备较强的学习能力,良好的分析能力、解决问题能力、沟通能力和团队协作能力;3有志于在先进工艺下为高性能开源RISC-V
IC前端设计/验证实习生
Beijing Vcore Technology Co.,Ltd.
中国/北京RISC-VRTL / HDLVerificationAug 11, 2026职位描述:1.使用chisel/verilog语言进行处理器核的开发2.负责使用前沿领域技术对模块级进行设计和性能分析3.协助验证工程师进行系统级仿真验证、覆盖率分析、FPGA验证、芯片调试4.参与芯片架构设计和spec定义5.负责设计文档的撰写 • 任职要求: • 1 理工科学生,公司提供IC设计/验证以及前后端协同开发等知识的培训; • 2.具有积极主动的工作态度,具备较强的学习能力,良好的分析能力、解决问题能力、沟通能力和团队协作能力; • 3有志于在先进工艺下为高性
Linux系统开发工程师
Beijing Vcore Technology Co.,Ltd.
中国/北京RISC-VKernel / LinuxFPGAAug 11, 2026岗位职责:1.负责soc的底层系统软件开发,完成uboot、Linux kernel和设备驱动程序的开发和调试;2.负责Linux系统软件相关的集成和稳定性调试、性能调优;3.负责根据产品需求完成软件架构设计、模块划分、编码、测试、验证、修复缺陷、集成等工作;4.分析芯片的系统级验证需求,指定pre-silicon的系统级验证计划;5.在Emulation/FPGA平台上,定位和解决pre-silicon bring-up过程中遇到的各种软硬件相关问题;6.参与芯片产品需求分
- 中国/北京RISC-VKernel / LinuxAug 11, 2026
岗位职责:1.负责产品的系统软件开发和维护;2.负责各外设模块的驱动程序开发和维护;3.负责kernel优化、系统启动、系统稳定性等相关的底层软件开发;4.负责分析、定位并解决产品软件系统的软硬件相关问题。 岗位要求:1.熟练掌握软件研发相关的专业知识;2.具有一定的电路知识,能够看懂硬件原理;3.熟悉Linux系统编程,具有嵌入式软件设计、开发经验;4.熟悉C、C++、汇编等汇编语言,掌握Python、Shell等脚本语言;满足如下条件之一,可以优先考虑:1.通信、电子、
Formal Verification Engineer
Ahead Computing
Guadalajara, MXRISC-VRTL / HDLVerificationAug 11, 2026We are seeking a Formal Verification Engineer to join our team. In this role, you will leverage advanced formal verification techniques to ensure the correctness and performance of high-end RISC-V cores. You will collaborate closely with ar
Embedded Software Engineer
The Charles Stark Draper Laboratory, Inc.
Cambridge, MARISC-VKernel / LinuxFirmwareAug 10, 2026Overview: Draper is an independent, nonprofit research and development company headquartered in Cambridge, MA. The 2,000+ employees of Draper tackle important national challenges with a promise of delivering successful and usable solutions