Senior Physical Design Engineer
RTL / HDLPhysical designPosted Aug 25, 2021
Overview
Skills named in this posting
- Low-power design (UPF)
Atmosic Technologies is looking for a senior physical design engineer who is passionate about delivering differentiated low-power and battery-free wireless connectivity solutions. Job title and responsibilities commensurate with experience.
Responsibilities:
• Manage the physical implementation of low power systems-on-a-chip, starting from RTL to tape out quality databases
Lead physical design flow including synthesis, LEC, timing, IR drop, formal, PNR, and ECO
Manage outsource external design services companies as needed by project schedules
Currently based on Cadence tools
Requirements:
• Track record of leading physical design on multiple projects
• Proficient in scripting and automation
• BS or MS (preferred) degree in EE with 10+ years of relevant physical design experience
Nice to Have:
• Significant experience with low power design.
• Familiar with creating UPF and/or CPF and leveraging them throughout the design flow
• Experience with Cadence Foundation Flow
Salary Range:
• The estimated salary range for this position is $160,000 to $190,000. At Atmosic, we strive to provide competitive and rewarding compensation based on experience and expertise, as well as market conditions, location, and pay equity. You will also be eligible for participating in our stock options and benefits plans.
Location:
• Irvine, California, USA
• Campbell (Silicon Valley), California, USA
Apply on the employer's site
Original posting: atmosic.com
RISC-V ecosystem
Atmosic in the RISC-V ecosystem
Battery free wireless devices · RF · US · founded 2016
Same employer
More roles at Atmosic
- Jan 15, 2025
Logic Designer (2025)
Atmosic
RISC-VRTL / HDLSoC / ASICJan 9, 2025- RTL / HDLVerificationJan 9, 2025
- Jan 7, 2025
Supply Chain Manager
Atmosic
May 2, 2024SW – Link Controller
Atmosic
FirmwareNov 30, 2023