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1,618 results · page 8 of 65 · dates: UTC

• V

  Senior Digital IC Engineer — RTL Design & Verification

  Visblsemi

  2026-10-20

  Contract · Hybrid Remote / SF Bay AreaRemoteRTL / HDLFirmwarePhysical designSoC / ASIC2026-10-20
• U

  ASIC/FPGA Logic Team Lead

  Unifabrix

  2026-10-20

  RTL / HDLSoC / ASICFPGA2026-10-20
• S

  Electrical Engineer

  SiLC

  2026-10-20

  Monrovia, CARTL / HDLFirmwareFPGA2026-10-20
• S

  Senior Embedded Systems Engineer

  SiLC

  2026-10-20

  Monrovia, CAFirmwareSoC / ASICFPGA2026-10-20
• SS

  FPGA工程师

  Shanghai StarFive Semiconductor Co., Ltd.

  2026-10-20

  上海、成都RTL / HDLSoC / ASICFPGA2026-10-20
• SS

  CPU验证工程师

  Shanghai StarFive Semiconductor Co., Ltd.

  2026-10-20

  北京、上海、成都RISC-VRTL / HDLVerificationFPGA2026-10-20
• 

  产品经理

  S2C LIMITED

  2026-10-20

  上海SoC / ASICFPGA2026-10-20
• 

  FPGA 原型工程师

  S2C LIMITED

  2026-10-20

  上海RTL / HDLSoC / ASICFPGA2026-10-20
• R

  FPGA Engineer (Prototyping)

  RaiderChip

  2026-10-20

  On-Site (Solares, Spain) • Full-timeRequirements: • Use FPGA emulation to stress, debug, and validate ASIC-designs • Leverage long-running, proven FPGA prototypes as functional reference • Validate functionality through SW simulation and HW emulation • Collaborate closely with ASIC frontend and verification engineers • Drive issue detection, root-cause analysis, and fix validation • Strong experience with RTL simulation and FPGA toolchains (AMD/Xilinx)FPGA2026-10-20
• NS

  ASIC RTL Design Engineer

  Nordic Semiconductor ASA

  2026-10-20

  Bristol, StockholmRTL / HDLVerificationCompilersPhysical design2026-10-20
• 

  Senior Engineer, ASIC Digital Design (System IP Verification)

  MIPS Tech LLC.

  2026-10-20

  Hsinchu, Hsinchu County, TaiwanRISC-VRTL / HDLVerificationFirmware2026-10-20
• M

  Design Verification Engineer (NPU/SoC)

  Mobilint

  2026-10-20

  모빌린트 본사RTL / HDLVerificationSoC / ASICFPGA2026-10-20
• M

  Hardware Application Engineer

  Mobilint

  2026-10-20

  모빌린트 본사SoC / ASICFPGA2026-10-20
• M

  NPU Core Engineer (RTL)

  Mobilint

  2026-10-20

  모빌린트 본사RTL / HDLPhysical designSoC / ASICFPGA2026-10-20
• M

  SoC Architect

  Mobilint

  2026-10-20

  모빌린트 본사Physical designSoC / ASICFPGA2026-10-20
• M

  SoC Design Engineer

  Mobilint

  2026-10-20

  모빌린트 본사RTL / HDLCompilersSoC / ASICFPGA2026-10-20
• LA

  Intern - Software Engineering

  Lyte AI

  2026-10-20

  Sunnyvale, CACompilersFirmwareFPGA2026-10-20
• LA

  Optical System Integration Engineer

  Lyte AI

  2026-10-20

  Sunnyvale, CAFirmwareSoC / ASICFPGA2026-10-20
• LA

  Photonics Validation Engineer

  Lyte AI

  2026-10-20

  Sunnyvale, CAFirmwareSoC / ASICFPGA2026-10-20
• LA

  Senior Design Verification Engineer

  Lyte AI

  2026-10-20

  Bucharest, RomaniaRTL / HDLVerificationSoC / ASICFPGA2026-10-20
• LA

  Senior Electrical Engineer

  Lyte AI

  2026-10-20

  Sunnyvale, CAFirmwareSoC / ASICFPGA2026-10-20
• LA

  Systems Algorithm Engineer

  Lyte AI

  2026-10-20

  Bucharest, RomaniaFPGA2026-10-20
• LA

  System Validation Engineer

  Lyte AI

  2026-10-20

  Sunnyvale, CAFirmwareSoC / ASICFPGA2026-10-20
• LA

  System Validation Engineer – PCB & Electro-Optics

  Lyte AI

  2026-10-20

  Sunnyvale, CAFirmwareSoC / ASICFPGA2026-10-20
• M

  Design Verification Engineer (Seoul, South Korea)

  MangoBoost

  2026-10-20

  RTL / HDLVerificationSoC / ASICFPGA2026-10-20