Register-transfer-level and HDL design in Verilog, SystemVerilog, VHDL and Chisel.
Roles 3,241–3,269 of 3,269, newest first.
Atmosic
Sr. Digital Design Engineer Atmosic is looking for a Sr. Digital Design Engineer who is passionate about delivering differentiated low-power and battery-free wireless connectivity solutions. You will provide technical leadership with prove
We are looking for an experienced digital verification engineer, who is capable of driving the required verification flows for our mixed-signal designs. The ability to work closely with rtl design team and the analog team, and to develop d
OmniDesign
We are looking for an experienced DFT engineer, who is capable of driving the required DFT flows for our digital designs. The ability to work closely with rtl and pnr design team to drive testability is a key feature of this role! Quali
We are looking for an experienced place-and-route engineer, who is capable of driving the required digital backend flows to create our designs. The ability to work closely with rtl design team to understand partition architecture and driv
VeriSilicon, Inc.
Design top-of-the-line graphics processors, including architecture, micro-architecture, implementation (using Verilog), and verification.
Senior Digital Design Engineer focusing on the digital datapath of high-performance analog-to-digital and digital-to-analog converters. Job responsibilities include RTL design, verification, behavioral modelling, support and assist with syn
OmniDesign
Digital Design Engineer focusing on high-performance analog-to-digital and digital-to-analog converters. Job responsibilities include RTL design, verification, behavioral modelling, support and assist with synthesis, timing closure and P&R
VeriSilicon, Inc.
• Design and implement new features in GPU architecture and C-Model. • Maintain existing GPU architecture and C-Model. • Evaluate and improve performance and quality of GPU architecture. • Design interface with driver. • Work with RTL team
VeriSilicon, Inc.
Design top-of-the-line graphics processors, including specification, architecture, micro-architecture, implementation (using Verilog), and verification.
VeriSilicon, Inc.
• Play an important role in defining chip spec and devising chip architecture. • Develop challenging modules including module spec definition, macro architecture design, RTL coding, simulation and synthesis. • Carry out chip level verificat
VeriSilicon, Inc.
• Understanding the expected functionality of designs. • Developing testing and regression plans. • Designing and developing verification environment. • Running RTL and gate-level simulations/regression. • Code/functional coverage developme
VeriSilicon, Inc.
Focus on analog/digital mixed IP and Chip design&implementation. The engineers need to act as a strong team member and contributor, who also need to collaborate with analog team and backend team. • Define IP block spec and micro-architectu
VeriSilicon, Inc.
Focus on analog/digital mixed IP and Chip verification. The engineers need to act as a strong team member and contributor, who also need to collaborate with digital F.E team closely. • Understanding the expected functionality of designs. •
VeriSilicon, Inc.
• Develop environments for ZSP system functional verification. • Write verification plans for ZSP system level IPs and systems. • Develop verification environments for IP and systems using C, verilog, Assembly, SystemVerilog, etc. • Contrib
VeriSilicon, Inc.
• Play an important role in defining video IP spec and devising Video IP architecture. • Develop challenging modules including module spec definition, macro architecture design, RTL coding, C coding, simulation and synthesis. • Carry out IP
VeriSilicon, Inc.
• Responsible for SDC and UPF/CPF development and debug. • Focus on design floor planning, power planning, IO planning, placement & CTS and routing, handling timing and congestion issue during project implementation. • IP level and chip lev
VeriSilicon, Inc.
• Understanding the expected functionality of designs. • Developing testing and regression plans. • Designing and developing verification environment. • Running RTL and gate-level simulations/regression. • Code/functional coverage developme
VeriSilicon, Inc.
• Comprehend the SoC clock structure and working mode and prepare the SDC file for SoC design. • Prepare the DFT plan for the SoC design. • SCAN/MBIST/BSD insertion and synthesize methodology for Flatten / Hierarchical design. • Pre/Post si
VeriSilicon, Inc.
• Design top-of-the-line image processors, including specification, architecture, micro-architecture, implementation (using Verilog), and verification.
VeriSilicon, Inc.
• Design top-of-the-line graphics/Vision processors, including specification, architecture, micro-architecture, implementation (using Verilog), and verification.
VeriSilicon, Inc.
• GPU & Vision architectural modeling and analysis of graphics/compute/vision algorithms and features. • Document/design/develop tools to validate models and analyze performance. • Develop tests, test plans, and testing infrastructure for n
VeriSilicon, Inc.
• Play a leadership role in defining video IP spec and devising Video IP architecture. • Develop challenging modules including module spec definition, macro architecture design, RTL coding, C coding, simulation and synthesis. • Carry out IP
VeriSilicon, Inc.
• Play an important role in defining video IP spec and devising Video IP architecture. • Develop challenging modules including module spec definition, macro architecture design, RTL coding, C coding, simulation and synthesis. • Carry out IP
VeriSilicon, Inc.
• Design and implement new features in GPU architecture and C-Model. • Maintain existing GPU architecture and C-Model. • Evaluate and improve performance and quality of GPU architecture. • Design interface with driver. • Work with RTL team
VeriSilicon, Inc.
• Solid front-end RTL design with complex ASIC design experience • Knowledge or experience of GPU/CPU or video/display architecture and design is plus • take the ideas/concepts to algorithms, u-arch, design implementation and chip productio
VeriSilicon, Inc.
• Processor core and subsystem microarchitecture and design • Actively participate in design, architecture and verification reviews • RTL design and synthesis to analyze & optimize power, speed and area of physical implementation • Define,
Analog/Mixed-Signal Verification Engineer focusing on high-performance analog-to-digital and digital-to-analog converters. Job responsibilities include the verification of analog and mixed-signal designs for high performance data converters
Job overview The Formal Verification Engineer independently executes formal verification activities for complex hardware designs, ensuring functional correctness, robustness, and quality before tape-out. The role involves developing and op
Senior Digital/Mixed-Signal Design Engineer focusing on high-performance analog-to-digital and digital-to-analog converters. Job responsibilities include development and verification of the digital controller for high performance data conve
