Register-transfer-level and HDL design in Verilog, SystemVerilog, VHDL and Chisel.
Roles 391–420 of 3,302, newest first.
About EdgeQ EdgeQ is a leading innovator developing the industry’s first 5G/6G base station on a chip for terrestrial and non-terrestrial network (NTN) markets. Recognized with multiple Global Mobile (GLOMO) Awards at Mobile World Congress
About EdgeQ EdgeQ is a leading innovator developing the industry’s first 5G/6G base station on a chip for terrestrial and non-terrestrial network (NTN) markets. Recognized with multiple Global Mobile (GLOMO) Awards at Mobile World Congress
About EdgeQ EdgeQ is a leading innovator developing the industry’s first 5G/6G base station on a chip for terrestrial and non-terrestrial network (NTN) markets. Recognized with multiple Global Mobile (GLOMO) Awards at Mobile World Congress
About EdgeQ EdgeQ is a leading innovator developing the industry’s first 5G/6G base station on a chip for terrestrial and non-terrestrial network (NTN) markets. Recognized with multiple Global Mobile (GLOMO) Awards at Mobile World Congress
CAST, Inc.
Job Title: Functional Safety Engineer Job Level: Junior-Senior-level Term: Full time, flexible hours Work Authorization: US, European Union or Foreign Citizen Degree: Minimum BS Electrical Engineering or related fields Location: Remote
Job Title: Junior Digital Design Engineer Job Level: Entry- to Mid-level Term: Full Time Work Authorization: European Union or Foreign Citizen Degree: MS in Electrical Engineering or Computer Science Location: Brno, Czech Republic Tra
Job Title: Junior Digital Design Engineer Job Level: Entry- to Mid-level Term: Full Time, flexible hours Work Authorization: US or Foreign Citizen Degree: MS in Electrical Engineering or Computer Science Location: Remote; Greece prefer
Summary As the Design Lead, you will spearhead the design and development of high-performance PMIC products. You will lead a multidisciplinary team to define chip architectures, oversee mixed-signal implementation, and ensure successful ta
Summary: We are looking for a Senior Power Management IC (PMIC) Analog Design Engineer to join our team. In this role, you will work on the architecture and design of high-performance analog and mixed-signal power chips. You will own compl
Summary As the Digital Design Lead, you will be responsible for the digital architecture, RTL implementation, and system integration of Power Management ICs. Key Responsibilities • Digital Architecture: Define and document the micro-arch
Description Senior Corporate Security Applications Engineer – HW SecurityLocation: Krakow Poland Arteris connects innovation. Our technology helps the world’s most visionary companies—from startups to Fortune 500 leaders—build smarter, fas
Description Senior Field Hardware Security Applications Engineer Location: Campbell CA or Austin TX Arteris connects innovation. Our technology helps the world’s most visionary companies—from startups to Fortune 500 leaders—build smarte
Description Staff Corporate Applications Engineer – HW SecurityLocation: Krakow Poland Arteris connects innovation. Our technology helps the world’s most visionary companies—from startups to Fortune 500 leaders—build smarter, faster, and s
Arteris IP
Description Design Verification Engineer (Magillem Registers)Localisation : Paris Arteris connecte l’innovation.Arteris permet aux équipes d’ingénierie et de conception des entreprises les plus innovantes au monde de connecter et d’intégre
Arteris IP
Description Design Verification Engineer (Magillem Registers)Localisation : Paris / Montigny-le-Bretonneux / Sophia Antipolis Arteris connecte l’innovation.Arteris permet aux équipes d’ingénierie et de conception des entreprises les plus i
Arteris IP
Description Hardware Verification Engineer Location: Krakow Arteris connects innovation. Our technology helps the world’s most visionary companies—from startups to Fortune 500 leaders—build smarter, faster semiconductors, specifically So
Description Ingénieur Logiciel design SoC Senior H/F Localisation : Paris / Montigny-le-Bretonneux / Sophia Antipolis Arteris connecte l’innovation. Notre technologie aide les entreprises les plus visionnaires au monde, des start-up aux e
Description Ingénieur logiciel en conception SoC H/F Localisation : Paris / Montigny-le-Bretonneux / Sophia Antipolis Arteris connecte l’innovation Notre technologie aide les entreprises les plus visionnaires au monde — des startups aux
Description Staff Product Engineer (H/F) Localisation : Montigny-le-Bretonneux (78), France Arteris connecte l’innovation Arteris permet aux équipes d’ingénierie et de conception des entreprises les plus innovantes au monde de connecter
Description Do you want to contribute to the backbone of some of the world’s most popular SoCs? As a Senior Staff / Principal Design Verification Engineer at Arteris, you will work with an expert team to design and deliver interconnect &
Description Principal Verification Engineer H/F Sophia Antipolis, France Arteris connecte l’innovation Arteris permet aux équipes d’ingénierie et de conception des entreprises les plus innovantes au monde de connecter et d’intégrer les sys
Arteris IP
Description Ingénieur FPGA Senior H/FLieu : Sophia-Antipolis, FranceArteris connecte l’innovationNotre technologie aide les entreprises les plus visionnaires au monde — des startups aux leaders du Fortune 500 — à concevoir des semi-conduct
Description [Senior Manager Field Application Engineer]Location: [Campbell CA”] Arteris connects innovation. Our technology helps the world’s most visionary companies—from startups to Fortune 500 leaders—build smarter, faster semiconductor
Description Senior Staff Design Verification Engineer F/H Localisation : Sophia Antipolis, France Arteris connecte l’innovation Notre technologie aide les entreprises les plus visionnaires au monde — des startups aux leaders du Fortune
Arteris IP
Description Arteris enables engineering and design teams at the world’s most transformative brands to connect and integrate today’s system-on-chips (SoCs) that fuel modern innovation. If you’ve held a smartphone, driven an electronic car,
Azimuth AI
ARM-oriented subsystem design, RTL development, and SoC integration.
Andes Technology Corporation
Role This role is a part of the VLSI team, which is part of Andes worldwide CPU development team. Andes is a rapidly growing organization, and you will get the opportunity to work with a team of experienced architects, designers and DV eng
Andes Technology Corporation
Role You will be a part of the VLSI team, which is part of Andes worldwide CPU development team. Andes is a rapidly growing organization, and you will work with a team of experienced architects, designers and DV engineers for building next
Andes Technology Corporation
Role This role is a part of the VLSI team, which is part of Andes worldwide CPU development team. Andes is a rapidly growing organization, and you will get the opportunity to work with a team of experienced architects, designers and DV eng
We are seeking a Senior CPU Design Engineer with expertise in execution unit design, including Integer ALUs, floating point units, and SIMD/Vector units. In this role, you will be responsible for designing and implementing high-performance
