Senior Principal Engineer, SoC Design Verification
MIPS Tech LLC.
Hyderabad, Telangāna, IndiaRISC-VRTL / HDLVerificationFirmware2026-10-23
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482 results · page 2 of 20 · dates: UTC
- Da Nang, VietnamRTL / HDLVerificationSoC / ASICFPGA2026-10-23
Associate Design Verification Engineer
Analog Devices, Inc.
Philippines, Cavite, GTCRTL / HDLVerification2026-10-222027 Student Engineer - CPU Design Verification
Advanced Micro Devices (AMD)
Iasi, RomaniaRTL / HDLVerification2026-10-22ASICS Design Verification Engineer
Qualcomm Technologies, Inc.
San Diego, California, United States of AmericaRTL / HDLVerificationSoC / ASIC2026-10-22NPU Design Verification Engineer (Multiple Levels)
Qualcomm Technologies, Inc.
San Diego, California, United States of AmericaRTL / HDLVerification2026-10-22Staff Digital Verification Engineer GPU Hardware Design - Athens or Patra, Greece
Qualcomm Technologies, Inc.
Marousi, GreeceRTL / HDLVerificationPhysical designSoC / ASIC2026-10-21Senior Digital Design Verification Engineer GPU Hardware - Athens or Patra, Greece
Qualcomm Technologies, Inc.
Marousi, GreeceRTL / HDLVerificationPhysical designSoC / ASIC2026-10-21Senior Design Verification Engineer
Lattice Semiconductor Corporation
Manila, PhilippinesRTL / HDLVerificationSoC / ASICFPGA2026-10-20Staff Design verification Engineer
Analog Devices, Inc.
India, Bangalore, RMZVerification2026-10-20Staff Engineer, Design Verification Engineering
Analog Devices, Inc.
India, Bangalore, RMZRTL / HDLVerification2026-10-20- Contract · Hybrid Remote / SF Bay AreaRemoteRTL / HDLFirmwarePhysical designSoC / ASIC2026-10-20
- San Jose, CaliforniaRTL / HDLVerificationSoC / ASIC2026-10-20
- Bengaluru, IndiaRTL / HDLVerificationFirmwareSoC / ASIC2026-10-20
ASIC Verification Engineer
RaiderChip
On-Site (Solares, Spain) • Full-timeRequirements: • Develop and execute comprehensive verification strategies for ASIC designs • Create simulation environments to aggressively validate functionality • Leverage existing FPGA-proven designs as reference and validation baseline • Strong experience with RTL simulation and verification methodologies • Working experience with Synopsys toolsVerificationSoC / ASIC2026-10-20FPGA Engineer (Prototyping)
RaiderChip
On-Site (Solares, Spain) • Full-timeRequirements: • Use FPGA emulation to stress, debug, and validate ASIC-designs • Leverage long-running, proven FPGA prototypes as functional reference • Validate functionality through SW simulation and HW emulation • Collaborate closely with ASIC frontend and verification engineers • Drive issue detection, root-cause analysis, and fix validation • Strong experience with RTL simulation and FPGA toolchains (AMD/Xilinx)FPGA2026-10-20- Hsinchu, Hsinchu County, TaiwanRISC-VRTL / HDLVerificationFirmware2026-10-20
Design Engineers & Engineering Leads
Netrasemi
Area: ASIC Design & Verification/ Embedded system / AI/ML Software/ Physical Design & Verification2026-10-20- 모빌린트 본사RTL / HDLVerificationSoC / ASICFPGA2026-10-20
- Bucharest, RomaniaRTL / HDLVerificationSoC / ASICFPGA2026-10-20
- RTL / HDLVerificationSoC / ASICFPGA2026-10-20
- ZürichVerification2026-10-20
Design Verification Engineer
Efinix Inc
RTL / HDLVerificationFPGA2026-10-20- Bangalore, IndiaRISC-VRTL / HDLVerificationSoC / ASIC2026-10-20
Design Verification Engineer H/F
Arteris IP
RTL / HDLVerificationCompilersSoC / ASIC2026-10-20
