上海RTL / HDLSoC / ASICFeb 23, 2022
• 独立完成ASIC功能模块的设计任务，包括：需求分析，架构定义，RTL编码，模块设计，逻辑综合和时序分析； • 和验证工程师合作，完成验证任务，保障设计质量，包括：review验证方案，debug, cdc 检查； • 作为芯片的设计者，配合系统工程师、物理实现工程师和测试工程师，解决功能验证、平面布置图设计、时序优化/收敛、可测试设计和芯片测试方面的问题。
VeriSilicon, Inc. 155 open roles
VeriSilicon is a Silicon Platform as a Service company that provides world class SoC and SiP solutions and a leading IP provider with IP portfolios address markets including mobile internet devices, datacenters, the Internet of Things (IoT), automotive, industrial, and medical electronics.
Roles 101–150 of 155, newest first. Search and filter them
Sales Operations Specialist
VeriSilicon, Inc.
Austin/TX or San Jose/CAFeb 10, 2022• Follow up on non-major client/prospect inquiries and drive inside sales opportunities below $50K directly with assistance from senior sales • Work with sales and finance to maximize support and maintenance renewal rates and collections •
Unix/Linux System Administrator
VeriSilicon, Inc.
San Jose, CAJan 14, 2022• Responsible for installation, upgrade, maintenance and troubleshooting of Unix/Linux Server issue. • Responsible for monitoring server health status. • Responsible for FTP project data transmission. • Participate in IT infrastructure rela
Technical Customer Interface & Success Manager/AE
VeriSilicon, Inc.
Austin, Texas, San Jose, CA, USSoC / ASICSep 16, 2021• Serve as the primary technical interface between customers and VeriSilicon internal teams for ASIC, SoC, IP licensing, and turnkey design service engagements • Support pre-sales and post-sales customer activities including technical pres
SoC Architect
VeriSilicon, Inc.
Austin, Texas, San Jose, CA, USFirmwarePhysical designSoC / ASICJul 1, 2021The candidate should have strong analytical thinking and problem-solving skills with excellent attention to details. Must be organized, self-motivated and able to work effectively across internal and end customers teams. Must be able to pri
Staff ASIC Design Engineer
VeriSilicon, Inc.
San Jose, CARTL / HDLSoC / ASICFeb 18, 2021Design top-of-the-line graphics processors, including architecture, micro-architecture, implementation (using Verilog), and verification.
Application Engineer
VeriSilicon, Inc.
JapanDec 4, 2020Job Responsibilities: To promote VeriSilicon products and services to customers in Japan and support customers in Japan to define specification and develop their systems through extensive hardware and software knowledge. Education : Bachel
Senior Staff Engineer
VeriSilicon, Inc.
San Jose, CAFirmwareNov 6, 2020• Analyze algorithmic and SW implementation trade-offs in audio and / or voice processing functions. • Identify evaluation criteria and undertake performance analysis of voice quality enhancement / audio solutions. • Contribute to design an
Sr. Director of ASIC Design Engineering
VeriSilicon, Inc.
Austin, Texas or San Jose, CaliforniaSoC / ASICMar 12, 2020VeriSilicon is seeking an experienced Sr Director of ASIC Design to join our high-performing team. • Leads ASIC design team to develop and productize next generation SoC’s • Work with cross-functional project teams to define product specif
GPU Architecture Engineer
VeriSilicon, Inc.
San Jose, CARTL / HDLVerificationFeb 19, 2020• Design and implement new features in GPU architecture and C-Model. • Maintain existing GPU architecture and C-Model. • Evaluate and improve performance and quality of GPU architecture. • Design interface with driver. • Work with RTL team
Staff Application Engineer
VeriSilicon, Inc.
San Jose, CAFeb 19, 2020• Develop expert level understanding of digital IP applications in the fields of artificial intelligence, computer vision, video processing, imaging, and computer graphics. • Collaborate internally and externally with R&D developers and cus
Sr. ASIC Design Engineer
VeriSilicon, Inc.
San Jose, CARTL / HDLSoC / ASICFeb 19, 2020Design top-of-the-line graphics processors, including specification, architecture, micro-architecture, implementation (using Verilog), and verification.
Software Engineer
VeriSilicon, Inc.
成都/上海SoC / ASICAug 22, 2019• 负责ASIC/SOC和IP子系统的软件开发项目，从驱动软件到中间件，以及应用级软件和性能分析 • 与硬件设计团队一起验证和测试系统/子系统/IP验证 • 帮助客户整合软件解决方案并支持其量产
Engineer/Sr. Engineer of SoC Design
VeriSilicon, Inc.
ChengduRTL / HDLSoC / ASICJul 24, 2019• Play an important role in defining chip spec and devising chip architecture. • Develop challenging modules including module spec definition, macro architecture design, RTL coding, simulation and synthesis. • Carry out chip level verificat
Engineer/Sr. Engineer of SoC Design Verification
VeriSilicon, Inc.
ChengduRTL / HDLVerificationSoC / ASICJul 24, 2019• Understanding the expected functionality of designs. • Developing testing and regression plans. • Designing and developing verification environment. • Running RTL and gate-level simulations/regression. • Code/functional coverage developme
Senior /System Application Engineer - IOT Protocol Software
VeriSilicon, Inc.
ChengduJul 24, 2019• To development BLE/802.15.4/WIFI related stack and protocol software solution. • To design the IOT wireless application solution including hardware debug and software development. • Co-work with team in customer project to develop the IOT
Senior / Embedded Software Engineer
VeriSilicon, Inc.
ChengduFirmwareSoC / ASICJul 24, 2019• Develop SW driver for peripheral IPs of SOC. • Co-work with ASIC IP team to finish the SOC peripheral IPs related SW verification.
Senior DFT(Design for Test) Engineer
VeriSilicon, Inc.
ChengduPhysical designJul 24, 2019• Complete DFT test plan definition. • Complete DFT logic design, including: memory BIST, memory BISR, scan insertion, boundary scan insertion, macro testing. • Complete DFT test pattern verification. • Complete DFT mode timing constraint,
Senior/Staff Digital Design Engineer
VeriSilicon, Inc.
ChengduRTL / HDLPhysical designJul 24, 2019Focus on analog/digital mixed IP and Chip design&implementation. The engineers need to act as a strong team member and contributor, who also need to collaborate with analog team and backend team. • Define IP block spec and micro-architectu
Senior/Staff Verification Engineer
VeriSilicon, Inc.
ChengduRTL / HDLVerificationJul 24, 2019Focus on analog/digital mixed IP and Chip verification. The engineers need to act as a strong team member and contributor, who also need to collaborate with digital F.E team closely. • Understanding the expected functionality of designs. •
RF Circuit Design Engineer
VeriSilicon, Inc.
ChengduJul 24, 2019• Devise and develop deep sub-micron CMOS analog circuit. • Guide and/or supervise layout. • Assist in the design of test boards so as to debug and verify test chips.
Engineer/Sr. Engineer of ZSP Design Verification
VeriSilicon, Inc.
ChengduRTL / HDLVerificationJul 24, 2019• Develop environments for ZSP system functional verification. • Write verification plans for ZSP system level IPs and systems. • Develop verification environments for IP and systems using C, verilog, Assembly, SystemVerilog, etc. • Contrib
Staff IP Solution Engineer
VeriSilicon, Inc.
ChengduJul 24, 2019• Develop expert level understanding of IP product offerings, including capabilities, competitiveness, and the applications. • Define new feature or product specification based on in-depth understanding of customer requirements. • Engage wi
Senior/Staff Engineer of VPU Design
VeriSilicon, Inc.
ChengduRTL / HDLJul 24, 2019• Play an important role in defining video IP spec and devising Video IP architecture. • Develop challenging modules including module spec definition, macro architecture design, RTL coding, C coding, simulation and synthesis. • Carry out IP
Engineer/Sr. Engineer of ZSP System Software
VeriSilicon, Inc.
ChengduJul 24, 2019As a software engineer, you will work on software development projects for Verisilicon audio DSP(ZSP) related algorithm and software, including audio codec, audio signal processing, performance optimization on audio DSP(ZSP), ASR, and relat
Software Engineer (Driver)
VeriSilicon, Inc.
ChengduJul 24, 2019GPU software (CD) team delicately focus on developing GPU 3D graphics and OpenCL computing driver. Overall, there are very few engineers in China who are really deeply involved in 3D graphics core technology. This team is one of them. Here
2D Software Development Engineer
VeriSilicon, Inc.
ChengduFirmwareJul 24, 2019• Be responsible for the development and maintenance of embedded system driver, based on ARM/PPC/x86 architecture. • Be responsible for Display Controller, 2D graphics GPU, Vector Graphics GPU driver development and integration and debug. •
System Software Engineer
VeriSilicon, Inc.
ChengduFirmwareJul 24, 2019• Be responsible for the development and maintenance of embedded system driver, based on ARM/PPC/x86 architecture. • Be responsible for driver code integration for Android, Linux window system. • Cooperate with other departments to complete
Multimedia Video Codec SW Engineer
VeriSilicon, Inc.
ChengduKernel / LinuxJul 24, 2019• Video codec control SW module design, multimedia video playback SW development. • Linux kernel driver implementation for HW video codec. • Customer project for special requirements/features in schedule. • Customer service on technical sup
Software Engineer
VeriSilicon, Inc.
ChengduJul 24, 2019As a software engineer, you will work on software development projects for Computer Vision and ML accelerator from middleware and application and performance analysis. You will also work with hardware design team together to verify and test
ISP Driver Staff Engineer
VeriSilicon, Inc.
ChengduFPGAJul 24, 2019The ideal candidate will be extremely passionate for ISP and Sensor driver design. He or she will be part of the talented ISP team to build up the high quality platform of VeriSilicon ISP products, and driving up the easy-using capability a
Software Release Qualification Engineer
VeriSilicon, Inc.
ChengduJul 9, 2019• Good understanding the functionality of products and related knowledge. • Follow the arrangement to finish assigned tasks on schedule with good quality independently. • Automate product test cases using Python, and execute product testing
Engineer/Sr. Engineer of Design Implementation
VeriSilicon, Inc.
ShanghaiRTL / HDLPhysical designJul 9, 2019• Responsible for SDC and UPF/CPF development and debug. • Focus on design floor planning, power planning, IO planning, placement & CTS and routing, handling timing and congestion issue during project implementation. • IP level and chip lev
Sr. Engineer/Staff Engineer of SoC Verification
VeriSilicon, Inc.
ShanghaiRTL / HDLVerificationSoC / ASICJul 9, 2019• Understanding the expected functionality of designs. • Developing testing and regression plans. • Designing and developing verification environment. • Running RTL and gate-level simulations/regression. • Code/functional coverage developme
Engineer/Sr. Engineer of SoC FE Flow
VeriSilicon, Inc.
ShanghaiRTL / HDLSoC / ASICJul 9, 2019• Comprehend the SoC clock structure and working mode and prepare the SDC file for SoC design. • Prepare the DFT plan for the SoC design. • SCAN/MBIST/BSD insertion and synthesize methodology for Flatten / Hierarchical design. • Pre/Post si
Engineer/Sr. Engineer of Embedded Software
VeriSilicon, Inc.
ShanghaiFirmwareSoC / ASICJul 9, 2019• Port Embedded Linux/Android for SoC chip, develop Linux driver and API for application. • Work with project members to determine system requirement, design prototyping and support customers in product applications.
Engineer/Sr. Engineer of System Application
VeriSilicon, Inc.
ShanghaiKernel / LinuxFirmwareSoC / ASICJul 9, 2019• Design and develop Embedded System in ASIC and SoC projects, including design and debug hardware and firmware like BSP, Drivers and API on board level. • Carry out System/Sub-system/IP FPGA verification/validation for IC and SoC design. •
Sr. Engineer of Circuit Design
VeriSilicon, Inc.
ShanghaiJul 9, 2019• Develop challenging analog circuits independently, including circuit design, simulation, testing, debugging and improvement. • Determine system requirement, define project specifications according to customer’s requirement. • Lead the pro
Staff Engineer of ISP Design
VeriSilicon, Inc.
ShanghaiRTL / HDLJul 9, 2019• Design top-of-the-line image processors, including specification, architecture, micro-architecture, implementation (using Verilog), and verification.
Senior/Staff ASIC Design Engineer of AR/AI Project
VeriSilicon, Inc.
ShanghaiRTL / HDLSoC / ASICJul 9, 2019• Design top-of-the-line graphics/Vision processors, including specification, architecture, micro-architecture, implementation (using Verilog), and verification.
Engineer of Compiler Software
VeriSilicon, Inc.
ShanghaiVerificationCompilersJul 9, 2019• Capable of independently contributing to and working on the design/implementation/verification of passes of certain intermediate-language representation level of backend compiler for GPU/DSP targets. • Capable of designing/implementing op
Engineer of GPU & Vision Architecture
VeriSilicon, Inc.
ShanghaiRTL / HDLJul 9, 2019• GPU & Vision architectural modeling and analysis of graphics/compute/vision algorithms and features. • Document/design/develop tools to validate models and analyze performance. • Develop tests, test plans, and testing infrastructure for n
Project Leader of Video IP Design
VeriSilicon, Inc.
ShanghaiRTL / HDLJul 9, 2019• Play a leadership role in defining video IP spec and devising Video IP architecture. • Develop challenging modules including module spec definition, macro architecture design, RTL coding, C coding, simulation and synthesis. • Carry out IP
Senior/Staff Engineer of Video IP Design
VeriSilicon, Inc.
ShanghaiRTL / HDLJul 9, 2019• Play an important role in defining video IP spec and devising Video IP architecture. • Develop challenging modules including module spec definition, macro architecture design, RTL coding, C coding, simulation and synthesis. • Carry out IP
Manager of Product Engineering
VeriSilicon, Inc.
ShanghaiJul 9, 2019• Manage local team of product and application engineers. • Develop expert level understanding of IP product offerings, and define new feature or product specification based on in-depth understanding of customer requirements. • Working with
System Administrator
VeriSilicon, Inc.
ShanghaiJul 9, 2019• Troubleshoot and administer engineering systems which are built up by Unix/Linux/Solaris systems. • Troubleshoot and manage network structure, it covers WAN, LAN, VPN. • Daily monitor system running status, system performance. • Make regu
RF IC Design Engineer
VeriSilicon, Inc.
ShanghaiJul 9, 2019• 基于CMOS工艺的射频收发芯片的电路和系统设计，制定各模块性能指标和实现方案； • 独立进行射频电路模块的设计，其中包括电路结构的确立、行为级和电路级的仿真、电路的实现和芯片的测试，并指导系统级射频应用。
Senior/Staff Engineer of IO Design
VeriSilicon, Inc.
ShanghaiPhysical designJul 9, 2019• Design General IO library and Customization IO library, provide instruction on layout work. • Design ESD cell and provide ESD guideline for different foundry and process node. • Provide whole chip ESD solution and pad cell floor plan on c
Manager of Program Management
VeriSilicon, Inc.
ChengduJul 9, 2019• Engage with customers to monitor customers’ project execution and make sure requirements, deliverables and schedule are being met. • Work with cross-functional teams in our division to address customers’ issues or questions and provide re
Machine learning/Computer Vision Architect
VeriSilicon, Inc.
San Jose, CAJul 9, 2019• Understand and analyze state of the art machine learning and computer vision algorithms. • Help develop architecture models and setup testing flow to verify. • Help build product prototypes and differentiate solutions. • Help identify per