Find work worth doing.

2,034 results · page 11 of 82 · dates: UTC

• 

  Member Technical Staff

  Maven Silicon Softech Private Limited

  2026-10-20

  RTL / HDLVerificationPhysical design2026-10-20
• S

  Applications Engineering Engineer - 19321

  Synopsys

  2026-10-20

  Da Nang, VietnamRTL / HDLCompilersPhysical designSoC / ASIC2026-10-20
• S

  Applications Engineering Engineer - 19312

  Synopsys

  2026-10-20

  Ho Chi Minh City, VietnamRTL / HDLCompilersPhysical designSoC / ASIC2026-10-20
• IB

  Physical Design Engineer

  International Business Machines Corporation

  2026-10-20

  Bangalore, INPhysical design2026-10-20
• IB

  Physical Design Engineer- Static Timing Analysis (STA)

  International Business Machines Corporation

  2026-10-20

  Bangalore, INPhysical design2026-10-20
• GA

  Member of Technical Staff — Analog IC

  Generation Alpha Transistor

  2026-10-20

  Headquartered in San Francisco · Full-timeRTL / HDLCompilersPhysical design2026-10-20
• GA

  Member of Technical Staff — AI for Silicon

  Generation Alpha Transistor

  2026-10-20

  Headquartered in San Francisco · Full-timePhysical design2026-10-20
• EI

  Senior Staff Software Engineer – Placement / Routing / Physical Synthesis

  Efinix Inc

  2026-10-20

  Physical designFPGA2026-10-20
• EI

  Digital IP Engineer

  Efinix Inc

  2026-10-20

  RTL / HDLVerificationPhysical designSoC / ASIC2026-10-20
• EI

  Physical Design Engineer

  Efinix Inc

  2026-10-20

  Physical design2026-10-20
• EI

  System Solutions FPGA Engineer

  Efinix Inc

  2026-10-20

  RISC-VRTL / HDLVerificationKernel / Linux2026-10-20
• E

  RTL Design Engineer

  EdgeQ

  2026-10-20

  Bangalore, IndiaRISC-VRTL / HDLFirmwarePhysical design2026-10-20
• E

  Staff ASIC Design Engineer – Machine Learning (ML) Accelerator

  EdgeQ

  2026-10-20

  Santa Clara, USRTL / HDLVerificationPhysical designSoC / ASIC2026-10-20
• E

  Senior Staff ASIC Design Engineer – Machine Learning (ML) Accelerator

  EdgeQ

  2026-10-20

  Santa Clara, USRISC-VRTL / HDLCompilersFirmware2026-10-20
• E

  Staff ASIC Design Engineer – 4G/5G/6G Modem

  EdgeQ

  2026-10-20

  Santa Clara, USRTL / HDLVerificationPhysical designSoC / ASIC2026-10-20
• E

  Senior Staff ASIC Design Engineer – 4G/5G/6G Modem

  EdgeQ

  2026-10-20

  Santa Clara, USRISC-VRTL / HDLFirmwarePhysical design2026-10-20
• C

  Digital IC Design Lead (PMIC & Mixed-Signal)

  Celera

  2026-10-20

  RTL / HDLCompilersFirmwarePhysical design2026-10-20
• AI

  Functional Safety Engineer / Ingénieur Sécurité Fonctionnelle H-F

  Arteris IP

  2026-10-20

  VerificationCompilersPhysical designSoC / ASIC2026-10-20
• AI

  Ingénieur Staff Produit / Staff Product Engineer F/H

  Arteris IP

  2026-10-20

  Montigny le Bretonneux, ParisRTL / HDLPhysical designSoC / ASIC2026-10-20
• AI

  Principal Hardware Architect / Architecte matériel principal H-F

  Arteris IP

  2026-10-20

  Biot, FranceVerificationPhysical designSoC / ASICSecurity2026-10-20
• AI

  Senior Manager Field Application Engineering

  Arteris IP

  2026-10-20

  Campbell, CaliforniaRISC-VRTL / HDLPhysical designSoC / ASIC2026-10-20
• 

  Senior CPU Microarchitecture & Logic Design Engineer, Out-of-Order Execution

  Ahead Computing

  2026-10-20

  Portland, OR, US; Austin, TX, USPhysical design2026-10-20
• 

  Senior CPU Microarchitecture & Logic Design Engineer, Execution Unit

  Ahead Computing

  2026-10-20

  Portland, OR, US; Austin, TX, USRTL / HDLPhysical design2026-10-20
• 

  Staff Physical Design Engineer – CPU PPA Optimization

  Ahead Computing

  2026-10-20

  Austin, TX, US; Portland, OR, USRTL / HDLPhysical design2026-10-20
• S

  ASIC Physical Design Intern

  Synopsys

  2026-10-20

  Yerevan, ArmeniaPhysical designSoC / ASIC2026-10-20